Closed pratik206 closed 4 years ago
auturgy
commented
4 years ago The build passes CI and on my local machine, so it is most likely something local to your build environment. I'd suggest asking in the forum (discuss.ardupilot.org) and include information required to reproduce: at a minimum your operating system, compiler version (gcc --version) and ArduPilot code branch (ie release, master, your own etc. Provide the git hash if you can).
pratik206
commented
4 years ago issue is solve by modifying flash.c file
@@ -1,136 +1,138 @@ /****
****/ /*
// #pragma GCC optimize("O0") / this driver has been tested with STM32F427 and STM32F412 /
// Refer Flash memory map in the User Manual to fill the following fields per microcontroller
// optionally disable interrupts during flash writes
// the 2nd bank of flash needs to be handled differently
static const uint32_t flash_memmap[STM32_FLASH_NPAGES] = { KB(16), KB(16), KB(16), KB(16), KB(64), KB(128), KB(128), KB(128) };
static const uint32_t flash_memmap[STM32_FLASH_NPAGES] = { KB(16), KB(16), KB(16), KB(16), KB(64), KB(128), KB(128), KB(128), KB(128), KB(128), KB(128), KB(128) };
static const uint32_t flash_memmap[STM32_FLASH_NPAGES] = { KB(16), KB(16), KB(16), KB(16), KB(64), KB(128), KB(128), KB(128), KB(128), KB(128), KB(128), KB(128), KB(16), KB(16), KB(16), KB(16), KB(64), KB(128), KB(128), KB(128), KB(128), KB(128), KB(128), KB(128)};
static const uint32_t flash_memmap[STM32_FLASH_NPAGES] = { KB(32), KB(32), KB(32), KB(32), KB(128), KB(256), KB(256), KB(256) };
static const uint32_t flash_memmap[STM32_FLASH_NPAGES] = { KB(32), KB(32), KB(32), KB(32), KB(128), KB(256), KB(256), KB(256), KB(256), KB(256), KB(256), KB(256) };
static_assert(STORAGE_FLASH_PAGE < STM32_FLASH_NPAGES, "STORAGE_FLASH_PAGE out of range");
// keep a cache of the page addresses
static uint32_t flash_pageaddr[STM32_FLASH_NPAGES]; static bool flash_pageaddr_initialised;
static bool flash_keep_unlocked;
/* Some compiler options will convert short loads and stores into byte loads
and stores. We don't want this to happen for IO reads and writes! / / # define getreg16(a) ((volatile uint16_t )(a)) / static inline uint16_t getreg16(unsigned int addr) { uint16_t retval; asm volatile("\tldrh %0, [%1]\n\t" : "=r"(retval) : "r"(addr)); return retval; } / define putreg16(v,a) ((volatile uint16_t )(a) = (v)) / static inline void putreg16(uint16_t val, unsigned int addr) { asm volatile("\tstrh %0, [%1]\n\t": : "r"(val), "r"(addr)); } / # define getreg32(a) ((volatile uint32_t )(a)) / static inline uint32_t getreg32(unsigned int addr) { uint32_t retval; asm volatile("\tldr %0, [%1]\n\t" : "=r"(retval) : "r"(addr)); return retval; } / define putreg32(v,a) / static inline void putreg32(uint32_t val, unsigned int addr) { (volatile uint32_t *)(addr) = val; } static void stm32_flash_wait_idle(void) { __DSB();
while ((FLASH->SR1 & (FLASH_SR_BSY|FLASH_SR_QW|FLASH_SR_WBNE)) || (FLASH->SR2 & (FLASH_SR_BSY|FLASH_SR_QW|FLASH_SR_WBNE))) { // nop }
while (FLASH->SR & FLASH_SR_BSY) { // nop }
} static void stm32_flash_clear_errors(void) {
FLASH->CCR1 = ~0; FLASH->CCR2 = ~0;
FLASH->SR = 0xF3;
} static void stm32_flash_unlock(void) { if (flash_keep_unlocked) { return; } stm32_flash_wait_idle();
if (FLASH->CR1 & FLASH_CR_LOCK) { / Unlock sequence / FLASH->KEYR1 = FLASH_KEY1; FLASH->KEYR1 = FLASH_KEY2; } if (FLASH->CR2 & FLASH_CR_LOCK) { / Unlock sequence / FLASH->KEYR2 = FLASH_KEY1; FLASH->KEYR2 = FLASH_KEY2; }
if (FLASH->CR & FLASH_CR_LOCK) { / Unlock sequence / FLASH->KEYR = FLASH_KEY1; FLASH->KEYR = FLASH_KEY2; }
// disable the data cache - see stm32 errata 2.1.11 FLASH->ACR &= ~FLASH_ACR_DCEN;
} void stm32_flash_lock(void) { if (flash_keep_unlocked) { return; }
if (FLASH->SR1 & FLASH_SR_QW) { FLASH->CR1 |= FLASH_CR_FW; } if (FLASH->SR2 & FLASH_SR_QW) { FLASH->CR2 |= FLASH_CR_FW; } stm32_flash_wait_idle(); FLASH->CR1 |= FLASH_CR_LOCK; FLASH->CR2 |= FLASH_CR_LOCK;
stm32_flash_wait_idle(); FLASH->CR |= FLASH_CR_LOCK;
// reset and re-enable the data cache - see stm32 errata 2.1.11 FLASH->ACR |= FLASH_ACR_DCRST; FLASH->ACR &= ~FLASH_ACR_DCRST; FLASH->ACR |= FLASH_ACR_DCEN;
} / get the memory address of a page / uint32_t stm32_flash_getpageaddr(uint32_t page) { if (page >= STM32_FLASH_NPAGES) { return 0; }
return STM32_FLASH_BASE + page STM32_FLASH_FIXED_PAGE_SIZE 1024;
if (!flash_pageaddr_initialised) { uint32_t address = STM32_FLASH_BASE; uint8_t i; for (i = 0; i < STM32_FLASH_NPAGES; i++) { flash_pageaddr[i] = address; address += stm32_flash_getpagesize(i); } flash_pageaddr_initialised = true; } return flash_pageaddr[page];
} / get size in bytes of a page / uint32_t stm32_flash_getpagesize(uint32_t page) {
(void)page; return STM32_FLASH_FIXED_PAGE_SIZE * 1024;
return flash_memmap[page];
} / return total number of pages / uint32_t stm32_flash_getnumpages() { return STM32_FLASH_NPAGES; } bool stm32_flash_ispageerased(uint32_t page) { uint32_t addr; uint32_t count; if (page >= STM32_FLASH_NPAGES) { return false; } for (addr = stm32_flash_getpageaddr(page), count = stm32_flash_getpagesize(page); count; count -= 4, addr += 4) { uint32_t v = getreg32(addr); if (v != 0xffffffff) { return false; } } return true; } / erase a page / bool stm32_flash_erasepage(uint32_t page) { if (page >= STM32_FLASH_NPAGES) { return false; }
syssts_t sts = chSysGetStatusAndLockX();
stm32_flash_wait_idle(); stm32_flash_unlock(); // clear any previous errors stm32_flash_clear_errors();
if (page < 8) { // first bank FLASH->SR1 = ~0; stm32_flash_wait_idle(); uint32_t snb = page << 8; // use 32 bit operations FLASH->CR1 = FLASH_CR_PSIZE_1 | snb | FLASH_CR_SER; FLASH->CR1 |= FLASH_CR_START; while (FLASH->SR1 & FLASH_SR_QW) ; } else { // second bank FLASH->SR2 = ~0; stm32_flash_wait_idle(); uint32_t snb = (page-8) << 8; // use 32 bit operations FLASH->CR2 = FLASH_CR_PSIZE_1 | snb | FLASH_CR_SER; FLASH->CR2 |= FLASH_CR_START; while (FLASH->SR2 & FLASH_SR_QW) ; }
FLASH->CR = FLASH_CR_PER; FLASH->AR = stm32_flash_getpageaddr(page); FLASH->CR |= FLASH_CR_STRT;
// the snb mask is not contiguous, calculate the mask for the page uint8_t snb = (((page % 12) << 3) | ((page / 12) << 7)); // use 32 bit operations FLASH->CR = FLASH_CR_PSIZE_1 | snb | FLASH_CR_SER; FLASH->CR |= FLASH_CR_STRT;
stm32_flash_wait_idle(); stm32_cacheBufferInvalidate((void*)stm32_flash_getpageaddr(page), stm32_flash_getpagesize(page)); stm32_flash_lock();
chSysRestoreStatusX(sts);
return stm32_flash_ispageerased(page); }
/ the H7 needs special handling, and only writes 32 bytes at a time / static bool stm32h7_flash_write32(uint32_t addr, const void buf) { volatile uint32_t CR, CCR, SR; if (addr - STM32_FLASH_BASE < 8 STM32_FLASH_FIXED_PAGE_SIZE 1024) { CR = &FLASH->CR1; CCR = &FLASH->CCR1; SR = &FLASH->SR1; } else { CR = &FLASH->CR2; CCR = &FLASH->CCR2; SR = &FLASH->SR2; } stm32_flash_wait_idle(); CCR = ~0; CR |= FLASH_CR_PG; const uint32_t v = (const uint32_t )buf; uint8_t i; for (i=0; i<8; i++) { while (SR & (FLASH_SR_BSY|FLASH_SR_QW)) ; putreg32(v, addr); v++; addr += 4; } __DSB(); stm32_flash_wait_idle(); CCR = ~0; CR &= ~FLASH_CR_PG; return true; } static bool stm32_flash_write_h7(uint32_t addr, const void buf, uint32_t count) { uint8_t b = (uint8_t )buf; if ((count & 0x1F) || (addr & 0x1F)) { // only allow 256 bit aligned writes return false; } stm32_flash_unlock(); while (count >= 32) { if (memcmp((void)addr, b, 32) != 0 && !stm32h7_flash_write32(addr, b)) { return false; } // check contents if (memcmp((void *)addr, b, 32) != 0) { stm32_flash_lock(); return false; } addr += 32; count -= 32; b += 32; } stm32_flash_lock(); return true; }
static bool stm32_flash_write_f4f7(uint32_t addr, const void buf, uint32_t count) { uint8_t b = (uint8_t )buf; / STM32 requires half-word access / if (count & 1) { return false; } if ((addr+count) >= STM32_FLASH_BASE+STM32_FLASH_SIZE) { return false; } / Get flash ready and begin flashing */ if (!(RCC->CR & RCC_CR_HSION)) { return false; }
syssts_t sts = chSysGetStatusAndLockX();
stm32_flash_unlock(); // clear previous errors stm32_flash_clear_errors(); stm32_flash_wait_idle(); // do as much as possible with 32 bit writes while (count >= 4 && (addr & 3) == 0) { FLASH->CR &= ~(FLASH_CR_PSIZE); FLASH->CR |= FLASH_CR_PSIZE_1 | FLASH_CR_PG; const uint32_t v1 = (uint32_t )b; putreg32(v1, addr); // ensure write ordering with cache __DSB();
stm32_flash_wait_idle();
const uint32_t v2 = getreg32(addr);
if (v2 != v1) {
FLASH->CR &= ~(FLASH_CR_PG);
goto failed;
}
count -= 4;
b += 4;
addr += 4;} // the rest as 16 bit while (count >= 2) { FLASH->CR &= ~(FLASH_CR_PSIZE); FLASH->CR |= FLASH_CR_PSIZE_0 | FLASH_CR_PG; putreg16((uint16_t )b, addr); // ensure write ordering with cache __DSB();
stm32_flash_wait_idle();
if (getreg16(addr) != *(uint16_t *)b) {
FLASH->CR &= ~(FLASH_CR_PG);
goto failed;
}
count -= 2;
b += 2;
addr += 2;} FLASH->CR &= ~(FLASH_CR_PG); stm32_flash_lock();
chSysRestoreStatusX(sts);
return true; failed: stm32_flash_lock();
chSysRestoreStatusX(sts);
return false; }
uint32_t _flash_fail_line; uint32_t _flash_fail_addr; uint32_t _flash_fail_count; uint8_t *_flash_fail_buf;
static bool stm32_flash_write_f1(uint32_t addr, const void buf, uint32_t count) { uint8_t b = (uint8_t )buf; / STM32 requires half-word access */ if (count & 1) { _flash_fail_line = LINE; return false; } if ((addr+count) >= STM32_FLASH_BASE+STM32_FLASH_SIZE) { _flash_fail_line = LINE; return false; }
syssts_t sts = chSysGetStatusAndLockX();
stm32_flash_unlock(); stm32_flash_wait_idle(); // program in 16 bit steps while (count >= 2) { FLASH->CR = FLASH_CR_PG; putreg16((uint16_t )b, addr); stm32_flash_wait_idle(); FLASH->CR = 0; if (getreg16(addr) != (uint16_t )b) { _flash_fail_line = LINE; _flash_fail_addr = addr; _flash_fail_count = count; _flash_fail_buf = b; goto failed; } count -= 2; b += 2; addr += 2; } stm32_flash_lock();
chSysRestoreStatusX(sts);
return true; failed: stm32_flash_lock();
chSysRestoreStatusX(sts);
return false; }
bool stm32_flash_write(uint32_t addr, const void *buf, uint32_t count) {
return stm32_flash_write_f1(addr, buf, count);
return stm32_flash_write_f4f7(addr, buf, count);
return stm32_flash_write_h7(addr, buf, count);
}
void stm32_flash_keep_unlocked(bool set)
{
if (set && !flash_keep_unlocked) {
stm32_flash_unlock();
flash_keep_unlocked = true;
} else if (!set && flash_keep_unlocked) {
flash_keep_unlocked = false;
stm32_flash_lock();
}
}
peterbarker
commented
4 years ago On Wed, 10 Jun 2020, pratik206 wrote:
../../libraries/AP_HAL_ChibiOS/hwdef/common/flash.c:131:15: note: in expansion of macro 'STORAGE_FLASH_PAGE' static_assert(STORAGE_FLASH_PAGE < STM32_FLASH_NPAGES,
This should already be fixed in master by 6a1f43d5df4867672e0063f4af031d3d5d0ae856
... but really, adding a minimum-compiler-version is probably something we ought to do.
root@DESKTOP-HF52UL6:~/GitHub1/ardupilot# ./waf copter Waf: Entering directory `/root/GitHub1/ardupilot/build/mRoX21-777' Checking for env.py env added BOARD_FLASH_SIZE=2048 env added APJ_BOARD_TYPE=STM32F777xx env added OPTIMIZE=-O2 env added USBID=0x1209/0x5740 env added MAIN_STACK=0x400 env added APJ_BOARD_ID=136 env added HAL_WITH_UAVCAN=1 env added CORTEX=cortex-m7 env added FLASH_RESERVE_START_KB=96 env added CHIBIOS_BUILD_FLAGS=USE_FATFS=yes MCU=cortex-m7 ENV_UDEFS=-DCHPRINTF_USE_FLOAT=1 CHIBIOS_PLATFORM_MK=os/hal/ports/STM32/STM32F7xx/platform.mk CHIBIOS_STARTUP_MK=os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f7xx.mk env added IOMCU_FW=0 env appended CPU_FLAGS=['-mcpu=cortex-m7', '-mfpu=fpv5-d16', '-mfloat-abi=hard', '-DARM_MATH_CM7', '-u_printf_float'] env added PERIPH_FW=0 env added PROCESS_STACK=0x2000 Padded 16 bytes for bootloader.bin to 16576 Embedding file bootloader.bin:/root/GitHub1/ardupilot/Tools/bootloaders/mRoX21-777_bl.bin Embedding file hwdef.dat:/root/GitHub1/ardupilot/build/mRoX21-777/hw.dat Embedding file io_firmware.bin:Tools/IO_Firmware/iofirmware_lowpolh.bin [ 9/10] Linking build/mRoX21-777/modules/ChibiOS/libch.a [1/1] ChibiOS: Compiling flash.c
In file included from ../../libraries/AP_HAL_ChibiOS/hwdef/common/chconf.h:31:0, from ../../modules/ChibiOS/os/rt/include/ch.h:90, from ../../modules/ChibiOS/os/hal/osal/rt/osal.h:32, from ../../modules/ChibiOS/os/hal/include/hal.h:28, from ../../libraries/AP_HAL_ChibiOS/hwdef/common/flash.h:18, from ../../libraries/AP_HAL_ChibiOS/hwdef/common/flash.c:51: ./hwdef.h:57:28: error: expected declaration specifiers or '...' before numeric constant
define STORAGE_FLASH_PAGE 1
../../libraries/AP_HAL_ChibiOS/hwdef/common/flash.c:131:15: note: in expansion of macro 'STORAGE_FLASH_PAGE' static_assert(STORAGE_FLASH_PAGE < STM32_FLASH_NPAGES, ^ ../../libraries/AP_HAL_ChibiOS/hwdef/common/flash.c:132:15: error: expected declaration specifiers or '...' before string constant "STORAGE_FLASH_PAGE out of range"); ^ make: *** [modules/ChibiOS/obj/flash.o] Error 1
Waf: Leaving directory `/root/GitHub1/ardupilot/build/mRoX21-777' Build failed -> task in 'ChibiOS_lib' failed (exit status 2): {task 139666074450112: ChibiOS_lib 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-> libch.a} (run with -v to display more information)