[INFO] Apple GPU LLVM Assembler

[Rastafabisch]

This tool might provide some useful information regarding apples GPU hardware. @alyssarosenzweig

https://github.com/tellowkrinkle/mtl-gpu-asmcheck

Feel free to close this "issues", wether useful or not. ;)

[TellowKrinkle]

Please don't use it for this project until people decide where it stands from a cleanroom reverse engineering standpoint

Some notes for anyone making that decision:

All programs in that repo...

• Use public LLVM headers to link against a private dylib
  • The version of public LLVM to use headers from was chosen by comparing the list of symbols exported by the private dylib to various versions of the public LLVM
• Run code from that private dylib directly, rather than through public interfaces
• Call the following functions that wouldn't exist on a libLLVM.dylib compiled from public sources:
  • LLVMInitializeAGX2AsmPrinter
  • LLVMInitializeAGX2ClauseAnalyzer
  • LLVMInitializeAGX2Disassembler
  • LLVMInitializeAGX2Target
  • LLVMInitializeAGX2TargetInfo
  • LLVMInitializeAGX2TargetMC

mtl-gpu-asmcheck (but not mtl-gpu-llc) also...

• Prints internal register names compiled into Apple's private libLLVM which would not otherwise be included in binaries sent to the GPU
• Prints LLVM instruction scheduling information compiled into Apple's private libLLVM which would not otherwise be included in binaries sent to the GPU

If you ask me, I'd say using mtl-gpu-llc to make AGX2 binaries from your Intel Mac is probably okay, but I have no clue about using mtl-gpu-asmcheck to get scheduling information

[marcan]

I need to run this by Alyssa, but a priori:

• Scheduling info is a no-no
• Register names are OK

[TellowKrinkle]

I updated the code to not print scheduling info by default

I previously lumped these into "scheduling information", but thoughts on printing...

• Which registers are treated as outputs
• Implicit registers (e.g. SP in stack manipulation operations)

Also, thoughts on messing with the instruction stream to see what encodings for similar instructions are (e.g. compiler says "output op3 R3, 0" but we call the code emitter on op3 R0, 0, op3 R1, 0, etc to see how the first operand is encoded into the instruction. Note that this can reveal additional information like which registers the code emitter considers valid for a given instruction)