DSC setup seems to just work for me when this higher pixel clock limit is simply removed again. With the limitation a 6K display is able to work up to 30Hz only, whereas with the limit removed, it just works without doing anything further in 6K@60Hz-10bit whereas the monitor starts reporting that DSC is in use.
This reverts commit 741b5811f2558846655a1d681c50e040c34622e2.
DSC setup seems to just work for me when this higher pixel clock limit is simply removed again. With the limitation a 6K display is able to work up to 30Hz only, whereas with the limit removed, it just works without doing anything further in 6K@60Hz-10bit whereas the monitor starts reporting that DSC is in use.
This reverts commit 741b5811f2558846655a1d681c50e040c34622e2.