Closed narrucmot closed 2 years ago
I found out from a support case I had open with Xilinx that the axi_intc devicetree settings changed for 2021.1. This PR also fixes the broken USB on the UltraZed-EG.
Looks good to me
Approved. Verified with vitis build of dpu design for u96v2-sbc-base platform.
I found out from a support case I had open with Xilinx that the axi_intc devicetree settings changed for 2021.1. This PR also fixes the broken USB on the UltraZed-EG.