FPGA as accelerators - strong opinions on your side?

[smoe]

Describe the problem FPGAs are increasingly accepted as accelerators. AMD just bought XIlinx, Intel has Altera for longer. And while GPUs have made it into BOINC and provide a considerable fraction of the BOINC muscle, FPGAs are not there, yet. The question is how BOINC should be made aware of these accelerators. FPGAs can be attached via USB, i.e. there may be many of them, or with more bandwidth and lower latency via PCI. Or it is a shield of the RPi? Sharing registers with the processor?

Describe the solution you'd like I propose an example for the UpperCase project that is based on an FPGA. That should be a only Open Source, like the Lattice USB stick. The straight-forward implementation likely is that the project announces compatibility with a particular set of FPGAs and provides firmware as a binary for a device the BOINC user claims to be attached. No autodetection. The tools to flash the binary must be installed by the user. The project also provides an executable that performs the communication with the device.

Context The OpenWrt platform is of strong interest for me to accomodate these small devices. Compute is one thing. FPGA open BOINC to all sorts of sensors/actuators.

Are there any strong opinions on where you would like this to go?

[AenBleidd]

General FPGA idea is great. But there are several points I want to mention:

• Regular user's have no FPGAs. It's a very expensive device. And even if user has it - usually it's just doing its routine and very unlikely it will be patched with different firmware.
• It's very hard to use FPGA. You need special device and/or software to patch/update firmware
• They're a big variety of FPGAs with different capabilities: cheaper devices usually less powerfully and thought can't be used for any firwmare.
• It's extremely complicated to create a firmware for FPGA (regular BOINC project developers are scientists, not experienced FPGA developers.
• Usually firmware is created for a specific FPGA just to fit its capabilities so it's extremely hard to create a firmware that could run on some variety of user devices. Also in order to test it you should have this FPGA and as I mentioned above it's quite expensive.
• There are not so many tasks that could effectively run on FPGA

Assuming all above, I don't think that adding support of FPGA to BOINC really worth it

[RichardHaselgrove]

Didn't we get some vision of this some years ago with the ASICs developed for coin mining? I don't remember it as a happy experience.

[smoe]

I suggest to start small. The big fat FPGA are expensive, as you said. The small FPGA that you want to target for a wider audience are not - we are talking $50 (https://www.digikey.com/en/products/detail/lattice-semiconductor-corporation/ICE40HX1K-STICK-EVN/4289604) here, $50 for something 8 times as big (https://www.digikey.com/en/products/detail/lattice-semiconductor-corporation/ICE40HX8K-B-EVN/4738851). And for anything non-floating-pointish like prime searches, rc5 or optimal golomb rulers these should be fine. And, something like a Xeon Skylake with integrated FPGA may already be contributing to BOINC.

For molecular dynamics with GROMACS (https://www.researchgate.net/publication/320202407_Molecular_Dynamics_on_FPGA_Based_Accelerated_Processing_Units) and docking with AutoDock (https://www.researchgate.net/publication/224178297_FPGA-based_acceleration_of_the_AutoDock_molecular_docking_software) there have been attempts but nothing really shines, I agree. But for biological sequence analysis, FPGA have already been used commercially in the last millenium (http://www.timelogic.com/catalog/757/tera-blast). As you said, the FPGA-savvy engineers do not need to help scientific groups to make a living these days and the scientists cannot carry it forward by themselves. Yes, that is a problem. And engineers do not want to invest their spare time for one or two users. A BOINC project suggesting to invest some 50 Euros for a reprogrammable accelerator - heck, compare that with the saved energy costs, the 50 Euros easily pay for themselves. That is why it is so important to have it all start small: limited time for engineers knowing a HDL with tricks up their sleeves how to debug/verify this all, low extra costs and a wide user base.

[smoe]

Didn't we get some vision of this some years ago with the ASICs developed for coin mining? I don't remember it as a happy experience.

FPGA have been used for a while to mine bitcoins for which these were outperforming the GPUs. This was until the same logics appeared as ASICs that outperformed FPGA - but ASICs are not reprogrammable. ASICs for coin mining still are a very happy experience, except that these don't compute anything of scientifc value. If a BOINC project is successful enough to have ASICs appear for it - that would be a success, and good for the world, say for docking or molecular dynamics. Yes, please!

[cminnoy]

The real issue here is not the FPGA, but the large variety of hardware to run BOINC tasks on. You need a big enough pool of similar hardware to justify the investment in development. As there is no off-the-shelve BOINC hardware...

[smoe]

In my vision a project implements something with a $40-80 FPGA as an accelerator, and if there is an interest in the science then folks will buy into that. And into that one only, so there is no need to support any larger variety. The challenge is to detect such boards while there is yet no firmware flashed onto them. But this could be done by the user, the thing could even programmed dynamically if there is support by an Open Source FPGA infrastructure for the device.

To get something working for all the integer problems of BOINC is technically not so ultimately difficult, but it needs to be wanted. For floating point the devices become costly.

[AenBleidd]

and if there is an interest in the science then folks will buy into that

And what if Project found an issue or just wants to make an update? Update firmware on FPGA is not an easy task and sometimes requires a special hardware for that.

[sirzooro]

My understanding is that users would have to build accelerator, and project would provide firmware for it. There should be a way to remotely read its version, so BOINC server could stop sending new WUs until upgrade is done.

[smoe]

I tend to agree that this all makes sense only if the user can locally update the firmware of the FPGA. The Webpack edition of Xilinx could possibly do, but I would want to avoid all that, I must admit. The Open Source FPGA pipeline around Yosys ships with Debian and is not too complicated to install on other platforms. I suggest that the firmware is shipped for different devices and then flashed as part of the BOINC job when the version is not right. The USB-attached FPGAs also work from within virtual images, if that is of concern.

[AenBleidd]

Closed as not needed