BU-Tools / uHAL_AXI_regmap

Tools for building AXI slave VHDL from uHAL address tables.
Apache License 2.0
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VHDL keywords in node names #6

Open andrewpeck opened 3 years ago

andrewpeck commented 3 years ago

It is a small thing but I noticed today by accident that if I name a node SELECT the generated VHDL will fail, since SELECT is a vhdl keyword..

Maybe the program could include some check for keywords like this at runtime so you don't have to wait until compiling the VHDL?

select, process, case, etc...