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Barebit / x86reference

X86 Opcode and Instruction Reference
http://ref.x86asm.net
GNU Lesser General Public License v3.0
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MOVSD use wrong operand types #22

Closed Kashio closed 9 months ago

Kashio commented 1 year ago

Right now MOVSD encoded with opcode F2 0F 10 or F2 0F 11 use operand type sd for its operand of addressing W which is defined as:

Scalar element of a 128-bit packed double-precision floating data.

According to the intel docs:

Moves a scalar double-precision floating-point value from the source operand (second operand) to the destination operand (first operand). The source and destination operands can be XMM registers or 64-bit memory locations. This instruction can be used to move a double-precision floating-point value to and from the low quadword of an XMM register and a 64-bit memory location, or to move a double-precision floating-point value between the low quadwords of two XMM registers. The instruction cannot be used to transfer data between memory locations.

Since it's only copying the lower 64 bits of the register and the memory variant is also referencing 64 bit memory the operand type should be of type q which is defined as:

Quadword, regardless of operand-size attribute (for example, CALL (FF /2)).

BarebitOpenSource commented 10 months ago

Thanks for your review, however, the type q means 64-bit integer while MOVSD operates on scalar (64-bit) element of a 128-bit packed double-precision floating data. In both cases the size is always 64 bits but the data type differs. Also the Intel manual indicates sd all the time.

Let me know if I'm missing something.

BarebitOpenSource commented 9 months ago

Feel free to reopen this issue if you still think the operand type is wrong.