MOVSS use wrong operand types

[Kashio]

Right now MOVSS encoded with opcode F3 0F 10 or F3 0F 11 use operand type ss for its operand of addressing W which is defined as:

Scalar element of a 128-bit packed single-precision floating data.

According to the intel docs:

Moves a scalar single-precision floating-point value from the source operand (second operand) to the destination operand (first operand). The source and destination operands can be XMM registers or 32-bit memory locations. This instruction can be used to move a single-precision floating-point value to and from the low doubleword of an XMM register and a 32-bit memory location, or to move a single-precision floating-point value between the low doublewords of two XMM registers. The instruction cannot be used to transfer data between memory locations.

Since it's only copying the lower 32 bits of the register and the memory variant is also referencing 32 bit memory the operand type should be of type d which is defined as:

Doubleword, regardless of operand-size attribute.

[BarebitOpenSource]

Thanks for your review. However, this is similar to #22.

The type d means 32-bit integer while MOVSS operates on scalar (32-bit) element of a 128-bit packed single-precision floating data. In both cases the size is always 32 bits but the data type differs. Also the Intel manual indicates ss in this case all the time.

[BarebitOpenSource]

Feel free to reopen this issue if you still think the operand type is wrong.