Barebit / x86reference

X86 Opcode and Instruction Reference
http://ref.x86asm.net
GNU Lesser General Public License v3.0
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UNPCKHPS use wrong operand types #26

Closed Kashio closed 4 months ago

Kashio commented 1 year ago

Right now UNPCKHPS encoded with opcode 0F 15 use operand type q for its operand of addressing W which is defined as:

Quadword, regardless of operand-size attribute (for example, CALL (FF /2)).

According to the intel docs:

Performs an interleaved unpack of the high single-precision floating-point values from the first source operand and the second source operand. 128-bit Legacy SSE version: The second source can be an XMM register or an 128-bit memory location. The destination is not distinct from the first source XMM register and the upper bits (MAXVL-1:128) of the corresponding ZMM register destination are unmodified. When unpacking from a memory operand, an implementation may fetch only the appropriate 64 bits; however, alignment to 16-byte boundary and normal segment checking will still be enforced.

Putting aside VEX/EVEX, the instruction is dealing with 128 bit single precision fp values for both its operands, the operand type should be of type ps which is defined as:

128-bit packed single-precision floating-point data.

BarebitOpenSource commented 9 months ago

Good point. I need to figure out why Intel uses this operand type in the manual.

BarebitOpenSource commented 4 months ago

Won't fix, see #27.