Right now UNPCKHPS encoded with opcode 0F 15 use operand type q for its operand of addressing W which is defined as:
Quadword, regardless of operand-size attribute (for example, CALL (FF /2)).
According to the intel docs:
Performs an interleaved unpack of the high single-precision floating-point values from the first source operand and the second source operand.
128-bit Legacy SSE version: The second source can be an XMM register or an 128-bit memory location. The destination is not distinct from the first source XMM register and the upper bits (MAXVL-1:128) of the corresponding ZMM register destination are unmodified. When unpacking from a memory operand, an implementation may fetch only the appropriate 64 bits; however, alignment to 16-byte boundary and normal segment checking will still be enforced.
Putting aside VEX/EVEX, the instruction is dealing with 128 bit single precision fp values for both its operands, the operand type should be of type ps which is defined as:
Right now
UNPCKHPS
encoded with opcode0F 15
use operand typeq
for its operand of addressingW
which is defined as:According to the intel docs:
Putting aside VEX/EVEX, the instruction is dealing with 128 bit single precision fp values for both its operands, the operand type should be of type
ps
which is defined as: