Barebit / x86reference

X86 Opcode and Instruction Reference
http://ref.x86asm.net
GNU Lesser General Public License v3.0
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MOVSHDUP use wrong operand types #27

Closed Kashio closed 4 months ago

Kashio commented 1 year ago

Right now MOVSHDUP encoded with opcode F3 0F 16 use operand type q for both its operands which is defined as:

Quadword, regardless of operand-size attribute (for example, CALL (FF /2)).

According to the intel docs:

Duplicates odd-indexed single-precision floating-point values from the source operand (the second operand) to adjacent element pair in the destination operand (the first operand). See Figure 4-3. The source operand is an XMM, YMM or ZMM register or 128, 256 or 512-bit memory location and the destination operand is an XMM, YMM or ZMM register.

Putting aside VEX/EVEX, the instruction is dealing with 128 bit single precision fp values for both its operands, the operand type should be of type ps which is defined as:

128-bit packed single-precision floating-point data.

BarebitOpenSource commented 9 months ago

Good point. I need to figure out why Intel uses this operand type in the manual.

Edit: see Core 2 manual, revision 028, 253667.pdf, opcode map.

BarebitOpenSource commented 4 months ago

I have reviewed it and I decided to keep it as it is. All the old Intel manuals consistently indicate the operands as MOVSHDUP Vq, Wq. Also the VMOVSHDUP operands are indicated as integers in the newest manual: Vx, Wx.

I have added the following XML note to the reference (see commit 48e324cb89bce):

although this instruction operates on packed FP values, Intel manual indicates the operands with integer types; this is presumably because the operands are treated as integers during the move operation

And this should be mentioned in the docs too so I keep this issue open.

BarebitOpenSource commented 4 months ago

Added to the main README.