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Barebit / x86reference

X86 Opcode and Instruction Reference
http://ref.x86asm.net
GNU Lesser General Public License v3.0
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RSQRTSS use wrong operand types #40

Closed Kashio closed 9 months ago

Kashio commented 1 year ago

Right now RSQRTSS encoded with opcode F3 0F 52 use operand type ss for its operand of addressing W which is defined as:

Scalar element of a 128-bit packed single-precision floating data.

According to the intel docs:

Computes an approximate reciprocal of the square root of the low single-precision floating-point value in the source operand (second operand) stores the single-precision floating-point result in the destination operand. The source operand can be an XMM register or a 32-bit memory location. The destination operand is an XMM register.

Since it's only operate on the lower 32 bits of the register and the memory variant is also referencing 32 bit memory the operand type should be of type d which is defined as:

Doubleword, regardless of operand-size attribute.

BarebitOpenSource commented 10 months ago

This one looks right. Refer to #23.

BarebitOpenSource commented 9 months ago

Feel free to reopen this issue if you still think the operand type is wrong.