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Barebit / x86reference

X86 Opcode and Instruction Reference
http://ref.x86asm.net
GNU Lesser General Public License v3.0
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CMPSS use wrong operand types #50

Closed Kashio closed 7 months ago

Kashio commented 1 year ago

Right now CMPSS encoded with opcode F3 0F C2 use operand type ss for its operand of addressing W which is defined as:

Scalar element of a 128-bit packed single-precision floating data.

According to the intel docs:

Compare low single-precision floating-point value in xmm2/m32 and xmm1 using bits 2:0 of imm8 as comparison predicate.

Since it's only comparing the lower 32 bits of the register and the memory variant is also referencing 32 bit memory the operand type should be of type q which is defined as:

Doubleword, regardless of operand-size attribute.

BarebitOpenSource commented 9 months ago

This one looks right. Refer to #23.

BarebitOpenSource commented 7 months ago

Feel free to reopen this issue if you still think the operand type is wrong.