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Barebit / x86reference

X86 Opcode and Instruction Reference
http://ref.x86asm.net
GNU Lesser General Public License v3.0
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Processor family doesn't really make sense #54

Closed Kashio closed 3 months ago

Kashio commented 1 year ago

The processor family which describes the instruction's introductory processor doesn't make sense. The list of available families right now are:

00: 8086
01: 80186
02: 80286
03: 80386
04: 80486
P1 (05): Pentium (1)
PX (06): Pentium with MMX
PP (07): Pentium Pro
P2 (08): Pentium II
P3 (09): Pentium III
P4 (10): Pentium 4
C1 (11): Core (1)
C2 (12): Core 2
C7 (13): Core i7
IT (99): Itanium (only geek editions)

Let's take for example instruction CLFLUSHOPT which was introduced in:

Skylake (server) Skylake (client) Goldmont

According to https://en.wikichip.org/wiki/x86/persistent_memory_extensions

Now, these are the microarchitectures supporting this instruction, while there can be skylake i3, there could also be skylake i5 and i7 depending on the manufacture process of a cpu it can be downgraded to any of these and will have disabled cores.

So unless I'm missing something here on what how these codes relates to the instruction introductory process, I think it should be changed to a list of instruction introductory microarchitecture and the family could vary, but it doesn't depend on the family.

It might be correct for the very first instructions where the jump from 80286 -> 80386 just introduced more instructions (and other stuff) but I think this rule breaks down later on, so I think it needs to be revised.

BarebitOpenSource commented 8 months ago

Yes, the "Introduced with Processor" comes from the time when the classification was simpler. We should use microarchitectures now.

BarebitOpenSource commented 3 months ago

Moved to https://github.com/mazegen/x86reference/issues/18