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Barebit / x86reference

X86 Opcode and Instruction Reference
http://ref.x86asm.net
GNU Lesser General Public License v3.0
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Add "system" instructions and prefixes #62

Closed BarebitOpenSource closed 5 months ago

BarebitOpenSource commented 10 months ago

Add "system" instructions and prefixes

INVPCID     Invalidate Process-Context Identifier
PREFETCHW   Prefetch Data into Caches in Anticipation of a Write
PREFETCHWT1 Prefetch Vector Data Into Caches with Intent to Write and T1 Hint
RDFSBASE    Read FS Segment Base
RDGSBASE    Read GS Segment Base
WRFSBASE    Write FS Segment Base
WRGSBASE    Write GS Segment Base
RDRAND      Read Random Number
RDSEED      Read Random SEED
XACQUIRE    Hardware Lock Elision Prefix Hint
XRELEASE    Hardware Lock Elision Prefix Hint
XRSTORS     Restore Processor Extended States Supervisor
XSAVEC      Save Processor Extended States with Compaction
XSAVEOPT    Save Processor Extended States Optimized
XSAVES      Save Processor Extended States Supervisor

HLE/RTM:

XBEGIN  Transactional Begin
XABORT  Transactional Abort
XEND    Transactional End

OSPKE:

RDPKRU  Read Protection Key Rights for User Pages
WRPKRU  Write Data to User Page Key Register

SGX1:

ENCLS   Execute an Enclave System Function of Specified Leaf Number
ENCLU   Execute an Enclave User Function of Specified Leaf Number
BarebitOpenSource commented 5 months ago

Moved to https://github.com/mazegen/x86reference/issues/12