Open PaulaGonzales10 opened 4 years ago
Hi! What FPGA unit did you use to run and test the Verilog codes? Because this design contains 1767 I/O ports.
It's an IP core, you gotta wrap it to run.
Hi! What FPGA unit did you use to run and test the Verilog codes? Because this design contains 1767 I/O ports.