Marble - work status - Githubissues

FPGA

[x] Capture unique-IDs: FPGA "DNA", Flash "Random number"
[x] USB: test UART to/from FPGA and microcontroller, program EEPROM
[x] SPI boot flash: can be programmed, and the FPGA will boot from it; configure OTP for write-protection
[x] Write-protect switch: remote readout changes state when actuated, prevents SPI flash programming when activated
[x] On-board VCXO: measure frequency vs. set value based on absolute pps reference (suggest GPS Pmod)
[x] Power supplies and their monitoring: read out and cross-check with hand-held voltmeter, exercise both barrel and PoE input, demo switching of FMC +12V power
[x] DDR3 memory: yes, thorough self-test, FPGA module
[x] FMC: FMC LPC connectivity can be checked with FMC Carrier Tester; HA and HB banks TBD
[ ] FMC MGT: connectivity can be checked with FMC Carrier Tester
[x] MGT clock multiplexing: exercise each input and each output
[ ] FMC GBTCLK inputs can be exercised with FMC Carrier Tester

Microcontroller:

[x] Watchdog the FPGA and its network connection, reset it on timeout
[x] Monitor temperature and fan speed over I2C
[x] Manage network settings (MAC and IP address) in EEPROM (user sets them via UART, get transferred to FPGA at boot via SPI)
[x] Monitor Ethernet PHY via its MDIO
[x] Set supply voltages over I2C for power-margining tests
[ ] Maintain trust model for un-brickable remote deployment
[ ] Relay JTAG commands to FMC slots

BerkeleyLab / Marble