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BoChen-Ye / Tiny_LeViT_Hardware_Accelerator

This is my hobby project with System Verilog to accelerate LeViT Network which contain CNN and Attention layer.
MIT License
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About block design #1

Open senshi1995 opened 1 month ago

senshi1995 commented 1 month ago

Hello, do you have the tcl script file of the entire project? Or I would like to ask how to see the block design of your entire accelerator design? Thank you very much!

BoChen-Ye commented 1 month ago

Sorry, I just finsh the functional behavior design and simulate in vivado so I have no timing constrain and tcl file.