Display optimization and SPI management

[elcojacobs]

This PR implements:

• A global SPI arbiter class, which implements mutex for the SPI bus. It also manages the settings for each SPI user (clock speed, CS pin, mode)
• Much faster SPI clock speed for the display, now that the SPI speed for LCD and touch can be set separately
• Buffering of display data, so it can be sent in bulk
• DMA transfer of this buffer, so it can happen in parallel with calculating new display commands.

This PR does not implement:

• Caching for display commands. When a display command is encountered, the current buffer is flushed and the communication in synchronized. Only pixel data is buffered. This is because the DC pin of the display has to be toggled for commands. If we create a smarter buffer, that also stores a data/command flag, then we could buffer commands too, and even let DMA handle them. The display is already much faster without command buffering, so this has been postponed as a low priority improvement later.