BrunoLevy / learn-fpga

Learning FPGA, yosys, nextpnr, and RISC-V
BSD 3-Clause "New" or "Revised" License
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FemtoRV/RTL/PROCESSOR/petitbateau: fix for Vivado #100

Closed trabucayre closed 1 year ago

trabucayre commented 1 year ago

As mentionned in this issue building petitbateau with Vivado >= 2019.1 fails with:

ERROR: [Synth 8-2715] syntax error near + [/xxx/litex-boards/litex_boards/targets/petitbateau.v:250]
ERROR: [Synth 8-2715] syntax error near + [/xxx/litex-boards/litex_boards/targets/petitbateau.v:313]

This PR replace iter++ by iter=iter+1 for loop to have an happy Vivado