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BrunoLevy / learn-fpga

Learning FPGA, yosys, nextpnr, and RISC-V
BSD 3-Clause "New" or "Revised" License
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Generate issue #36

Closed corerd closed 3 years ago

corerd commented 3 years ago

Hello Bruno,

First of all, many thanks for your great job.

I had issues generating the bitstream for IceStick ICE40HX1K that I fixed in the following way.

My devices configuration icestick_config.v file:

define NRV_IO_LEDS // Mapped IO, LEDs D1,D2,D3,D4 (D5 is used to display errors) //define NRV_IO_IRDA // In IO_LEDS, support for the IRDA on the IceStick (WIP) define NRV_IO_UART // Mapped IO, virtual UART (USB) //define NRV_IO_SSD1351 // Mapped IO, 128x128x64K OLED screen //define NRV_IO_MAX7219 // Mapped IO, 8x8 led matrix define NRV_MAPPED_SPI_FLASH // SPI flash mapped in address space. Use with MINIRV32 to run code from SPI flash.

I kept the remainder the same.

Toolchain:

Yosys 0.9 Icarus Verilog version 10.3 (stable) Verilator 4.028

Issue #1. ERROR: Identifier xxx is implicitly declared

To let the synthesis continue, I had to declare them in some way. I state that I'm new in FPGA design and Verilog coding, then I'm not sure to had made the right things. Particularly, in SSD1351_1331.v file. But the synthesis completes and the bitstream works well (I don't use SSD1351 device).

Issue #2. Missing wait_cycles.S file

This file is required by the built process and I restored it from one of your previous commit.

Issue #3. sieve.c example

I added an infinite loop to see the output continuously.

Issue #4. NextPNR submodules sources

Indeed this is not an issue related to you. Some submodule dependencies have been added to the NextPNR repository. I suggest you to include this information in your toolchain install guide.

BrunoLevy commented 3 years ago

I think I have fixed the issue, please tell me what it gives with your version. Best wishes, -- Bruno UPDATE: - I just tried again with hello.prog, and everything seems to be fine with my board, are you sure your version / configuration is identical with the upstream version ? I double checked, normally I have committed everything. (and yes, last time I had forgotten to commit wait_cycles.c, stupid me !)

corerd commented 3 years ago

Thank you, Bruno! I just merged your upstream repository. Did you forgot the wait_cycles.c file? :-) Now both the bitstream and the firmware examples are compiled without errors. Neither implicitly declared identifiers, nor missing functions errors are raised.

But.... Nothing is displayed anymore on the serial terminal :-( I tried hello.prog and sysconfig.prog at baud rates: 115200, 57600, 28800, 19200, 9800.

UPDATE: I apologize, it was my fault. I forgot to to deactivate SSD1351 and MAX7219 in my icestick_config.v, Now everything is working well. Anyway, I suggest you to keep those devices deactivated in your upstream, so that the basic firmware examples are working out of the box using a serial terminal, that is available to everyone.

You also fixed a baud rate issue: before your last commits, I had to set the serial terminal to 28800 baud instead of 115200, as expected.

Once again thank you for the great job.

corerd commented 3 years ago

I'd rather put a for(;;) than a goto :-)

You are right! You won't believe it, but I have never used the goto instruction before now. And I did it in a public site like this where everyone can read.... It's a shame! :-)

BrunoLevy commented 3 years ago

Thank you very much for your feedback ! And thank you for the explanation of the visibility of wires/regs in generate blocks (it was a mystery for me before) (and yes, I'll follow your suggestion of deactivating the OLED screen and led matrix that not everybody has) Best wishes, -- Bruno