BrunoLevy / learn-fpga

Learning FPGA, yosys, nextpnr, and RISC-V
BSD 3-Clause "New" or "Revised" License
2.44k stars 236 forks source link

ice-sugar-nano: PLL avaliable but unused #86

Open wingrime opened 1 year ago

wingrime commented 1 year ago

uart also does need matched freq unless print garbage, fixed by setting 12 Mhz but not good