update X configuration so all components are active
tested with ERS.f19_g16.X.yellowstone_intel
Modified default XWAV, XROF, XGLC grid
Modified GLC gland4km grid size
Modified a few glc fields set in xwav to meet 0/1 requirements for those fields.
Test suite:
Test baseline:
Test namelist changes:
Test status: [bit for bit, roundoff, climate changing]
update X configuration so all components are active tested with ERS.f19_g16.X.yellowstone_intel
Modified default XWAV, XROF, XGLC grid Modified GLC gland4km grid size Modified a few glc fields set in xwav to meet 0/1 requirements for those fields.
Test suite: Test baseline: Test namelist changes: Test status: [bit for bit, roundoff, climate changing]
Fixes [CIME Github issue #]
User interface changes?:
Code review: