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CHERIoT-Platform / llvm-project

Fork of LLVM adding CHERIoT, based on the CHERI LLVM fork
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Make cheriot part of the target triple #44

Open resistor opened 2 weeks ago

resistor commented 2 weeks ago

The fact that CHERIoT is not part of the target triple in LLVM IR causes a few problems. One interesting one is this:

target datalayout = "e-m:e-pf200:64:64:64:32-p:32:32-i64:64-n32-S128-A200-P200-G200"
target triple = "riscv32-unknown-unknown"

define i32 @foo(i32 %a) addrspace(200) {
entry:
    %r = tail call i32 @bar(i32 %a) #0
    ret i32 %r
}

declare i32 @bar(i32) addrspace(200)

This IR will be parsed by opt, but will not be parsed by llc. This is very surprising, and it arises because llc allows the target triple to override the datalayout string during loading. This causes the program address to be incorrectly determined when using llc.