Use `tp` as extra temporary register?

CHERIoT-Platform / llvm-project

Fork of LLVM adding CHERIoT, based on the CHERI LLVM fork

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Use `tp` as extra temporary register? #53

Open rmn30 opened 4 days ago

rmn30 commented 4 days ago

The RISC-V ABI specifies x4 as the "thread pointer", tp. I think it's currently unused except in assembly code. We should think about using it as an extra temporary register.

resistor commented 4 days ago

Staged in https://github.com/resistor/llvm-project-1/commit/7437be589fe39299275896396ea2e84395c063e9

rmn30 commented 1 day ago

We should probably have this behind a compiler flag just in case it needs to be used for its intended purpose.

davidchisnall commented 1 day ago

We already have a way of requesting the thread ID. I don't think there's any value in making this conditional. The concept of TLS doesn't make sense in CHERIoT and we already have an ABI for compartment-invocation-local storage.