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CTSRD-CHERI / Toooba

RISC-V Core; superscalar, out-of-order, multi-core capable; based on RISCY-OOO from MIT
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Set mtval for excStoreCapPageFault-s correctly #10

Closed nwf closed 3 years ago

nwf commented 3 years ago

These were previously defaulting to 0, deeply confusing the kernel.