The idea is to have a bit in the MMU pte, similar to the existing A+D bits to indicate if a particular page has a tag bit set in it or not. This can be used to speed up things like swap, page migration, garbage collection etc, since the OS will not have to scan the entire page looking for tags.
When a write to a page with a tag bit set in the write data and the T bit clear in the PTE, a store page fault is raised.
The mechanism could be supported in hardware directly, which is likely if the A+D bits are done in that way.
jrtc27
commented
1 year ago
The idea is to have a bit in the MMU pte, similar to the existing A+D bits to indicate if a particular page has a tag bit set in it or not. This can be used to speed up things like swap, page migration, garbage collection etc, since the OS will not have to scan the entire page looking for tags.
When a write to a page with a tag bit set in the write data and the T bit clear in the PTE, a store page fault is raised.
The mechanism could be supported in hardware directly, which is likely if the A+D bits are done in that way.