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CTSRD-CHERI / cheri-specification

CHERI ISA Specification
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Encoding conflict #48

Open tariqkurd-repo opened 1 year ago

tariqkurd-repo commented 1 year ago

Hi,

I filed a related issue against the RISC-V ISA manual: https://github.com/riscv/riscv-isa-manual/issues/1048

The problem is that [C]LC/[C]SC use the encodings for LQ/SQ. However, LQ/SQ aren't specified in the RISC-V ISA manual.

The specific problem is that LQ with a target of x0 overlaps with CBO.INVAL, CBO.FLUSH, CBO.ZERO

A workaround is to say that LQ can't target x0, and to use the CBO encoding instead.

If you look at the other issue, Andrew Waterman suggests encodings for LQ/SQ which would be a better long-term solution (although please note that no encodings are guaranteed until the CHERI is frozen - they will all have to go through a formal allocation process).

jrtc27 commented 1 year ago

Yes, it's unfortunate that the CBO instructions trampled on what had been community consensus for LQ's encoding (first in TinyEmu and more recently in QEMU). For now we collide, but we'll need to reencode before ratification, just like all the custom opcode space instructions.

tariqkurd-repo commented 1 year ago

OK - so there is a precedence set for the LQ encoding - I wasn't sure where that had come from.

tariqkurd-repo commented 1 year ago

@jrtc27 presumably the SAIL model doesn't check for encoding conflicts then? Is there any way it can do so?

jrtc27 commented 1 year ago

It doesn't, and by definition there are overlapping clauses given there are catch-all mappings to (C.)ILLEGAL.