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CTSRD-CHERI / de10pro-hps-template

DEPRECATED: moved to github.com/POETSII/DE10Pro-hps-template
https://github.com/POETSII/DE10Pro-hps-template
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Lack of support for DE10 HPS on Quartus Pro 20.1 #1

Open tmarkettos opened 4 years ago

tmarkettos commented 4 years ago

Quartus Pro 20.1 claims pin clashes:

Info(175029): IO12LANE_X61_Y327_N2 
Error(14566): The Fitter cannot place 1 periphery component(s) due to conflicts with existing constraints (1 IO_LANE(s)). Fix the errors described in the submessages, and then rerun the Fitter. The Intel FPGA Knowledge Database may also contain articles with information on how to resolve this periphery placement failure. Review the errors and then visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. 
    Error(175020): The Fitter cannot place logic IO_LANE that is part of Generic Component emif_hps in region (61, 1) to (61, 400), to which it is constrained, because there are no valid locations in the region for logic of this type. 
        Info(14596): Information about the failing component(s): 
            Info(175028): The IO_LANE name(s): soc|emif_hps|altera_emif_s10_hps_inst|arch|arch_inst|io_tiles_wrap_inst|io_tiles_inst|tile_gen[2].lane_gen[1].lane_inst|lane_inst 
        Error(16234): No legal location could be found out of 1 considered location(s).  Reasons why each location could not be used are summarized below: 
            Info(175013): The IO_LANE is constrained to the region (61, 1) to (61, 400) due to related logic 
                Info(175015): The I/O pad DDR4A_ACT_n is constrained to the location PIN_H38 due to: User Location Constraints (PIN_H38) 
                Info(14709): The constrained I/O pad drives a TILE_CTRL, which drives this IO_LANE 
            Error(175005): Could not find a location with: HPS_DATA_LANE_RESERVATION_ID of HPS_LANE (1 location affected) 
                Info(175029): IO12LANE_X61_Y327_N2 
Error(175020): The Fitter cannot place logic IO_LANE that is part of Generic Component emif_hps in region (61, 1) to (61, 400), to which it is constrained, because there are no valid locations in the region for logic of this type. 
    Info(14596): Information about the failing component(s): 
        Info(175028): The IO_LANE name(s): soc|emif_hps|altera_emif_s10_hps_inst|arch|arch_inst|io_tiles_wrap_inst|io_tiles_inst|tile_gen[2].lane_gen[1].lane_inst|lane_inst 
    Error(16234): No legal location could be found out of 1 considered location(s).  Reasons why each location could not be used are summarized below: 
        Info(175013): The IO_LANE is constrained to the region (61, 1) to (61, 400) due to related logic 
            Info(175015): The I/O pad DDR4A_ACT_n is constrained to the location PIN_H38 due to: User Location Constraints (PIN_H38) 
            Info(14709): The constrained I/O pad drives a TILE_CTRL, which drives this IO_LANE 
        Error(175005): Could not find a location with: HPS_DATA_LANE_RESERVATION_ID of HPS_LANE (1 location affected) 
            Info(175029): IO12LANE_X61_Y327_N2 
Info(14596): Information about the failing component(s): 
    Info(175028): The IO_LANE name(s): soc|emif_hps|altera_emif_s10_hps_inst|arch|arch_inst|io_tiles_wrap_inst|io_tiles_inst|tile_gen[2].lane_gen[1].lane_inst|lane_inst 
Error(16234): No legal location could be found out of 1 considered location(s).  Reasons why each location could not be used are summarized below: 
    Info(175013): The IO_LANE is constrained to the region (61, 1) to (61, 400) due to related logic 
        Info(175015): The I/O pad DDR4A_ACT_n is constrained to the location PIN_H38 due to: User Location Constraints (PIN_H38) 
        Info(14709): The constrained I/O pad drives a TILE_CTRL, which drives this IO_LANE 
    Error(175005): Could not find a location with: HPS_DATA_LANE_RESERVATION_ID of HPS_LANE (1 location affected) 
        Info(175029): IO12LANE_X61_Y327_N2 
Info(175013): The IO_LANE is constrained to the region (61, 1) to (61, 400) due to related logic 
    Info(175015): The I/O pad DDR4A_ACT_n is constrained to the location PIN_H38 due to: User Location Constraints (PIN_H38) 
    Info(14709): The constrained I/O pad drives a TILE_CTRL, which drives this IO_LANE 
Error(175005): Could not find a location with: HPS_DATA_LANE_RESERVATION_ID of HPS_LANE (1 location affected) 
    Info(175029): IO12LANE_X61_Y327_N2

Also, if built with 19.2, Quartus 20.1 claims not to support this DE10Pro device for embedding bootloaders:

Info: *******************************************************************
Info: Running Quartus Prime Convert_programming_file                                                                       
    Info: Version 20.1.0 Build 177 04/06/2020 SC Pro Edition                                                               
    Info: Copyright (C) 2020  Intel Corporation. All rights reserved.                                                      
...
Info: Command: quartus_cpf --bootloader=u-boot-socfpga/spl/u-boot-spl-dtb.ihex ../de10pro-hps-template-q19.2/output_files/DE10_Pro.sof ../de10pro-hps-template-q19.2/output_files/DE10_Pro-hps.sof                                                    
Error (20687): Convert Programming Files does not support the target device 1sx280hu2f50e1vg. Please use Programming File Generator to generate the programming file for the target device.                                                           
Error: Quartus Prime Convert_programming_file was unsuccessful. 1 error, 1 warning
tmarkettos commented 4 years ago

Quartus Pro 20.1 release notes say:

The Intel Stratix 10 device family has been removed from the Convert Programming File (CPF) utility. Use the Programming File Generator (PFG) tool instead.

and using quartus_pfg should solve the bootloader embedding problem. Example guide.