3.2.33, 3.2.34 and 3.2.35 describing RDDC_EL0, RSP_EL0 and RTPIDR_EL0 in the Morello ISA [1] specify that read and write operations for these registers require the Executive mode in Morello.
Limit the access to RDDC_EL0 and RSP_EL0 as specific in the ISA. Note that this limitation was already implemented for RTPIDR_EL0.
3.2.33, 3.2.34 and 3.2.35 describing RDDC_EL0, RSP_EL0 and RTPIDR_EL0 in the Morello ISA [1] specify that read and write operations for these registers require the Executive mode in Morello.
Limit the access to RDDC_EL0 and RSP_EL0 as specific in the ISA. Note that this limitation was already implemented for RTPIDR_EL0.
[1] https://developer.arm.com/documentation/ddi0606/ak/