Event 'sensitivity' at different rows

[tbolten]

Hello,

I’m using your CeleX 4 Dynamic Vision Sensor in my current research project. When I did a frequency-based analysis of the generated events, I noticed a special ‘phenomenon’. It seems that the top rows of the sensor are more sensitive and generate more events than the other rows.

For clarification, I have performed an experiment using a homogeneous strobe light (sheet of paper as diffuser) and recorded the corresponding event stream. From this recording (in total a few seconds) I calculated the histogram of all occurred events (polarity of -1, 0 and 1).

From this histogram it is clearly visible that there is a difference of the amount of triggered events for the top rows of the sensor. Interestingly, this difference begins exactly at the transition between row 511 and 512 (2^9).

Do you have an idea why this is - or how I can avoid this?

I’m using the current FPGA configuration bitfile (‘top.bit’) from your git-repository:

$ file top.bit top.bit: Xilinx BIT data - from top.ncd;HW_TIMEOUT=FALSE;UserID=0xFFFFFFFF - for 6slx45fgg484 - built 2018/08/08(11:45:05) - data length 0x16a78c

$ md5sum top.bit ba7625eda7d27c2818045da47d57d262 top.bit

[tbolten]

I have received the following answer to my request via e-mail:

The issue you found is possible for CeleX4, because different readout frequency of the top rows of the sensor. We have 640 rows in CeleX4 sensor chip, which separated into 5 blocks based on rows. The first block has higher readout frequency than the rest of four blocks. Therefore, 0-511 and 512-639 rows have different read out frequency. If you need the same readout frequency rows, you could turn off the 512-639 rows.

[tbolten]

I asked some follow up questions about this topic and I like to share to answers for all others:

Is the readout-frequency used for the first block (rows 512~639) by default a multiple of the frequency used for the other blocks?

the factor is 4

Is there a particular reason to use different frequencies for the blocks?

no particular reason, it comes from chip design

Is it possible to adjust the frequency instead of switching off the pixel range?

can not adjust

Short sample snippet to turn off some blocks of the sensor:

FrontPanel::getInstance()->wireIn(0x05, 0x00, 0x01); //DAC_APPLY OFF

FrontPanel::getInstance()->wireIn(0x04, value, 0x03FF); //block control value
FrontPanel::getInstance()->wireIn(0x04, 0xF000, 0xF000); //block control address

FrontPanel::getInstance()->wireIn(0x05, 0x01, 0x01); //DAC_APPLY ON

Where the variable 'value' is a bit-pattern defining the blocks:

Bit0: set0, valid Block 0-127@768. Set1, shut down Bit1: set0, valid Block 128-255@768. Set1, shut down Bit2: set0, valid Block 126-383@768. Set1, shut down Bit3: set0, valid Block 384-511@768. Set1, shut down Bit4: set0, valid Block 512-639@768. Set1, shut down