Floating point support

[CharlyCst]

For now we just ignore floating point registers, but we should ensure they are not leaking from the S-mode payload to the firmware.

I don't know much about the RISC-V implementation yet, but for other architectures there is a dirty bit that says if the floating point registers were accessed. If RISC-V has a similar concept, we should save the floating point registers before transitioning from the payload to the firmware, or from the payload to the firmware.

[francois141]

@CharlyCst According to the specification: "The FS[1:0] and VS[1:0] WARL fields and the XS[1:0] read-only field are used to reduce the cost of context save and restore by setting and tracking the current state of the floating-point unit and any other user-mode extensions respectively."

[francois141]

@CharlyCst Any oppositions if I grab this feature this week?

[CharlyCst]

As discussed we should look into that when we dig into policy modules.

[francois141]

@CharlyCst I link this issue to my PR for the protect Payload policy as we also tackle this problem at the same time.