Chilledheart / yass

lightweight and efficient, socks/http forward proxy. privoxy is not required. pure native, written in c++ and rust.
https://letshack.info/2024/01/22/iOS-VPN-Service/
Other
154 stars 11 forks source link

Bugfix: riscv mismatch float abi warning with lto build #345

Closed Chilledheart closed 1 year ago

Chilledheart commented 1 year ago

linkage issue:

Hard-float 'd' ABI can't be used for a target that doesn't support the D instruction set extension (ignoring target-abi)

Chilledheart commented 1 year ago
(base) ➜  sid-amd64-riscv64 echo | LD_LIBRARY_PATH=./usr/lib/x86_64-linux-gnu ./usr/bin/riscv64-linux-gnu-gcc -dM -E -|grep -i float
#define __FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__
#define __SIZEOF_FLOAT__ 4
#define __riscv_float_abi_double 1
(base) ➜  sid-amd64-riscv64 echo | LD_LIBRARY_PATH=./usr/lib/x86_64-linux-gnu ./usr/bin/riscv64-linux-gnu-gcc -dM -E -|grep -i riscv
#define __riscv 1
#define __riscv_atomic 1
#define __riscv_cmodel_medany 1
#define __riscv_mul 1
#define __riscv_muldiv 1
#define __riscv_xlen 64
#define __riscv_fsqrt 1
#define __riscv_m 2000000
#define __riscv_fdiv 1
#define __riscv_a 2001000
#define __riscv_c 2000000
#define __riscv_d 2002000
#define __riscv_f 2002000
#define __riscv_i 2001000
#define __riscv_zicsr 2000000
#define __riscv_compressed 1
#define __riscv_float_abi_double 1
#define __riscv_flen 64
#define __riscv_arch_test 1
#define __riscv_div 1
#define __riscv_zifencei 2000000
$ echo | ./third_party/llvm-build/Release+Asserts/bin/clang -target riscv64-linux-gnu -march=rv64imafdc -mabi=lp64d -dM -E - | grep -i riscv
#define __riscv 1
#define __riscv_a 2001000
#define __riscv_arch_test 1
#define __riscv_atomic 1
#define __riscv_c 2000000
#define __riscv_cmodel_medlow 1
#define __riscv_compressed 1
#define __riscv_d 2002000
#define __riscv_div 1
#define __riscv_f 2002000
#define __riscv_fdiv 1
#define __riscv_flen 64
#define __riscv_float_abi_double 1
#define __riscv_fsqrt 1
#define __riscv_i 2001000
#define __riscv_m 2000000
#define __riscv_mul 1
#define __riscv_muldiv 1
#define __riscv_xlen 64
#define __riscv_zicsr 2000000
Chilledheart commented 1 year ago
(base) ➜  sid-amd64-riscv64 echo | clang -target riscv64-linux-gnu -Xclang -target-abi -Xclang lp64f -dM -E -|grep -i float
#define __SIZEOF_FLOAT__ 4
#define __riscv_float_abi_single 1
(base) ➜  sid-amd64-riscv64 echo | clang -target riscv64-linux-gnu -Xclang -target-abi -Xclang lp64d -dM -E -|grep -i float
#define __SIZEOF_FLOAT__ 4
#define __riscv_float_abi_double 1
(base) ➜  sid-amd64-riscv64 echo | clang -target riscv64-linux-gnu -Xclang -target-abi -Xclang lp64 -dM -E -|grep -i float
#define __SIZEOF_FLOAT__ 4
#define __riscv_float_abi_soft 1
(base) ➜  sid-amd64-riscv64 echo | LD_LIBRARY_PATH=./usr/lib/x86_64-linux-gnu ./usr/bin/riscv64-linux-gnu-gcc -dM -E -|grep -i float
#define __FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__
#define __SIZEOF_FLOAT__ 4
#define __riscv_float_abi_double 1

we should switch to -Xclang -target-abi -Xclang lp64d

Chilledheart commented 1 year ago
(sid-amd64-riscv64)root@ubuntu:/home/hky/yass# riscv64-linux-gnu-gcc -Q  --help=target
The following options are target specific:
  -mabi=                            lp64d
  -malign-data=                     xlen
  -march=                           rv64imafdc_zicsr_zifencei
  -mbig-endian                      [disabled]
  -mbionic                          [disabled]
  -mbranch-cost=N                   3
  -mcmodel=                         [default]
  -mcpu=PROCESSOR                   
  -mcsr-check                       [disabled]
  -mdiv                             [enabled]
  -mexplicit-relocs                 [disabled]
  -mfdiv                            [enabled]
  -mglibc                           [enabled]
  -minline-atomics                  [enabled]
  -misa-spec=                       20191213
  -mlittle-endian                   [enabled]
  -mmusl                            [disabled]
  -mplt                             [enabled]
  -mpreferred-stack-boundary=       0
  -mrelax                           [enabled]
  -mriscv-attribute                 [enabled]
  -msave-restore                    [disabled]
  -mshorten-memrefs                 [enabled]
  -msmall-data-limit=N              0
  -mstack-protector-guard-offset=   
  -mstack-protector-guard-reg=      
  -mstack-protector-guard=          global
  -mstrict-align                    [enabled]
  -mtune=PROCESSOR                  
  -muclibc                          [disabled]

  Supported ABIs (for use with the -mabi= option):
    ilp32 ilp32d ilp32e ilp32f lp64 lp64d lp64f

  Known code models (for use with the -mcmodel= option):
    medany medlow

  Supported ISA specs (for use with the -misa-spec= option):
    2.2 20190608 20191213

  Known data alignment choices (for use with the -malign-data= option):
    natural xlen

  Valid arguments to -mstack-protector-guard=:
    global tls

  Known valid arguments for -mcpu= option:
    sifive-e20 sifive-e21 sifive-e24 sifive-e31 sifive-e34 sifive-e76 sifive-s21 sifive-s51 sifive-s54 sifive-s76 sifive-u54 sifive-u74 thead-c906

  Known valid arguments for -mtune= option:
    rocket sifive-3-series sifive-5-series sifive-7-series thead-c906 size sifive-e20 sifive-e21 sifive-e24 sifive-e31 sifive-e34 sifive-e76 sifive-s21 sifive-s51 sifive-s54 sifive-s76 sifive-u54 sifive-u74 thead-c906