We have a very useful set of embeddings for California chips with the associated geometries and labels.
We also have a set with the patch level embeddings, but I don't know how to divide the chip geometry to patch geometries.
We also need the labels within the patches, not the current labels within the bigger chips.
We have a very useful set of embeddings for California chips with the associated geometries and labels. We also have a set with the patch level embeddings, but I don't know how to divide the chip geometry to patch geometries.
We also need the labels within the patches, not the current labels within the bigger chips.
Is it possible to generate these?
Cc @rramosp @yellowcap