Closed dvv closed 9 years ago
Hi. Sorry for very long answer, I have not noticed message. Seems like there are invalid timer initialization. CS22 bin is in TCCR2B register, not TCCR2A.
Also you can write me in russian.
Thanks! Now it works:
/* Timer initialization */
#define CLUNET_TIMER_INIT {unset_bit4(TCCR2A, WGM21, WGM20, COM2A1, COM2A0); /* Timer2, normal mode */ \
set_bit(TCCR2B, CS22); unset_bit3(TCCR2B, WGM22, CS21, CS20); /* 64x prescaler */ }
/* Timer registers */
#define CLUNET_TIMER_REG TCNT2
#define CLUNET_TIMER_REG_OCR OCR2A
/* How to enable and disable timer interrupts */
#define CLUNET_ENABLE_TIMER_COMP set_bit(TIMSK2, OCIE2A)
#define CLUNET_DISABLE_TIMER_COMP unset_bit(TIMSK2, OCIE2A)
#define CLUNET_ENABLE_TIMER_OVF set_bit(TIMSK2, TOIE2)
#define CLUNET_DISABLE_TIMER_OVF unset_bit(TIMSK2, TOIE2)
/* How to init and enable external interrupt (read pin) */
#define CLUNET_INIT_INT {set_bit(EICRA,ISC00);unset_bit(EICRA,ISC01); set_bit(EIMSK, INT0);}
/* Interrupt vectors */
#define CLUNET_TIMER_COMP_VECTOR TIMER2_COMPA_vect
#define CLUNET_TIMER_OVF_VECTOR TIMER2_OVF_vect
#define CLUNET_INT_VECTOR INT0_vect
I tried the following transmitting code: [[https://bitbucket.org/dvv/clunet-tx/src]] but it seems TX is always
0
(hence bus is1
). Tested with a logic analyser. Both in transistor (ULN, actually) and transistor-less modes. With and without a reading node. The circuit rechecked many times. Wonder if you could point me what am I doing wrong? TIA, --Vladimir