Closed bchetwynd closed 1 year ago
The assertion is actually from the tlul_fifo component... which throws an assertion when an X gets read from the fifo. Given that scratchpad accesses can be 8, 16, 32, or 64 bits.... this can happen a lot during the boot process. A complete initialization of scratchpad memory (during initialization) might be warranted.
As noted, this is only applicable when performing an ASIC simulation. Performing the initialization in a way that does not substantially extend simulation time will require using some of the "hooks" (i.e., tasks) in the ASIC specific memory models. As this is not applicable to the open source distribution, this issue will be closed... for now.
This would require RTL changes to the SCRATCHPAD wrappers to incorporate the "grounding" of d_channel data based on the a_channel mask (thus assuring X's never get written to the response fifo)
Or.... a simulation only initialization of scratchpad memory would suffice.
only applicable in simulating the ASIC version of the CEP, which does not initialize the scratchpad memory.
The ARM simulation model for the sramspo8192x64mt_rvt component does have tasks that support "backdoor" loading of main memory. These could be used to initialization the memory to all zeroes (or a backdoor load of code too)