while the implementation progresses, we should think about the potential to express and prefer the critical path of a parallel application in later scheduling.
While we can implement various strategies in schedulers, e.g. prefer (MPI) communication, CUDA kernel launches, etc., one might also want to be able to express a (known) critical path. We have some experience in Dresden with critical path analysis, see e.g. the PhD defense of Robert Dietrich on October 9th 2019, 11 AM and the master's thesis of Felix Schmitt (both ZIH), which is now part of the NVIDIA Visual Profiler.
Hi,
while the implementation progresses, we should think about the potential to express and prefer the critical path of a parallel application in later scheduling.
While we can implement various strategies in schedulers, e.g. prefer (MPI) communication, CUDA kernel launches, etc., one might also want to be able to express a (known) critical path. We have some experience in Dresden with critical path analysis, see e.g. the PhD defense of Robert Dietrich on October 9th 2019, 11 AM and the master's thesis of Felix Schmitt (both ZIH), which is now part of the NVIDIA Visual Profiler.