Closed TodorGinchev closed 5 years ago
Why did you set to 1Mhz ? The XCLK is waiting for 8 MHz isn't it ?
Thanks Simon
XCLK is 8MHz, actually it has to be minimum 8MHz and maximum 24MHz according to the datasheet. But then the camera can use internal divider to change the pixel clock. Otherwise, how can you imagine creating an 8MHz clock, reading the data at 8MHz rate and send it at 2Mbaus with the Atmega328P? Impossible, that is why @ComputerNerd sets the divider to 25, 21, 12, etc.
This is done by setting the register 0x11 to the desired value. But after power on, the register value resets, I don't understand why...
Regards. Todor.
Are you saying the camera loses power while the program is running? If so you will need to rewrite all registers. The registers are stored in volatile memory in the ov7670.
My problem is that I wanted to configure the camera once and then forget about the registers and the SCCB communication protocol. It's not that it loses power.
So it's in RAM... very weird, so every time the camera starts, its internal program writes the registers which we then modify? I don't understand why they have done that, maybe in case someone misconfigures the camera...
Thank you very much @ComputerNerd, now I understand the behavior of the camera.
Regards. Todor.
BTW, @ComputerNerd, this comment here is wrong, I think:
while(!(PIND&8));//wait for low while((PIND&8));//wait for high
It should be:
while(!(PIND&8));//wait for low while((PIND&8));//wait for high
But the code is OK, it waits to VSYNC to become low and high, when the frame starts.
But there is something very interesting that I found out and if I am right I don't understand how is that your code works: when the frame starts, even if VSYNC is high, there is a delay before the data sending starts (and delay after every "row" of the image matrix). You don't use HREF, how do you control those delays? I mean, how do you know when the delay starts and ends? PCLK and VSYNC do not seem sufficient to me (most probably I am wrong).
Regards. Todor.
DId you fail your copy paste for the diff ? :)
So it's in RAM... very weird, so every time the camera starts, its internal program writes the registers which we then modify? I don't understand why they have done that, maybe in case someone misconfigures the camera...
Registers are constantly updated. Some internally by the Soc's processor every frame. If another technology say eeprom were used it would wear out very quickly.
BTW, @ComputerNerd, this comment here is wrong, I think:
I am always glad to hear about errors even comments however in this case it is correct. For example wait for low is while((PIND&4)); because it will keep looping until the pin reads as low or false.
But there is something very interesting that I found out and if I am right I don't understand how is that your code works: when the frame starts, even if VSYNC is high, there is a delay before the data sending starts (and delay after every "row" of the image matrix). You don't use HREF, how do you control those delays? I mean, how do you know when the delay starts and ends? PCLK and VSYNC do not seem sufficient to me (most probably I am wrong).
PCLK is disabled during HBLANK and VBLANK. I wait for VSYNC so the capture is not started during the middle of an image.
You are right about the comments, my fault.
About the PCLK disabled during HBLANK and VBLANK, my Logic Analyzer doesn't feel that way.
Did you start the capture immediately after powering on your Arduino? Try a few seconds and try again.
Yes, I wait for a minute more or less, but I figured out that even if I change to QQVGA resolution, the register is not properly written. The 0x11 register changes as the PCLK is divided by 32 (I use the maximum divider value) but the other registers not change, as I count 1280 rows x 640 columns. Very interesting, I am starting to think that something may be wrong with my camera, I purchased a new one.
Thank you very much for your support, I will inform if I find what I am doing wrong.
Regards. Todor.
Hello everyone,
I noticed something very interesting (and in my case very bad for my project).
With the @ComputerNerd code, I am able to change the PCLK clock and get 1MHz (being XCLK 8MHz) by changing the register 0x11, which configures the clock divider.
Good for now. The interesting stuff happens when the camera is powered off and on. If I do not change again the register 0x11, the XCLK will be 8MHz.
Is there any way to save the register state? Thank you!
Regards. Todor.