Closed BenjaminPelletier closed 2 months ago
This appears to have been a hardware issue with my setup. When I changed wires to tap all the signals for my logic analyzer, the problem went away.
Just to double-check.
Is this relevant for the waitForDRDY() function, or for the new code you introduced? I will also look at the code in a few minutes and check things on my side.
After the fix in #14, I still observe a bad measurement once every few seconds when cycling quickly through differential measurements at high speed.
I connect AIN0 to 3.3V and all other inputs to ground and then use the sketch below. I then observe things like:
I notice just 5 different failure modes, but will try to characterize them in more detail later.
Differential stress test sketch (threshold constants may need to be tweaked depending on setup):