Closed VividRGBLighting closed 10 months ago
It's not just for recording, it's basically a mapping from internal "universes" to outputs (or inputs in the case of recording). So you can record a cue on let's say universe id 1 and 2 from sACN. Then you set up an output to take Cosmos Id and send it to DMX port A, and Cosmos Id 2 to go out via ArtNet. Or even do both DMX Port and sACN. I don't mind renaming it, but the functionality is powerful, just need to figure out a good explanation for it. "Slot" may be a good term.
So it's a matrix of Input universe, Stored universe and output universe? I can send input universe 3 Tell the DMX Core record it as DC Universe 8 when DC plays, play universe 8 as universe 14?
Yup, it can be mapped in any way you'd like (even if the UI may not currently display all the complex configs. I want a term that means the internal universe id, but I don't want to use "universe id", because it could be mapped to unicast to a specific node via ArtNet, or go out on the internal DMX port, so it's not a 1:1 relationship with sACN universes for example. Maybe Slot is better? So you can record sACN universe 3 into Slot 1. And when you play back you can have that sent to DMX Port A, for example.
This is a perfect place to put a "help" button that links you to a page that provides explains the options and also maybe even a sexy graphic
I renamed it "Slot Id". Also added a Help page.
The term "Cosmos" - while I understand it now in the sense of "universe", is not intuitively understandable.
If I understand correctly - the Cosmos ID is the "recording slot" that the data gets recorded into? So Universe 1 could be recorded into "slot" 7, and then I slot 7 could be assigned to export on universe 4? Or is there a fixed relationship?
Perhaps consider it "DMX Core ID" Or DMX Core Slot? Or some other term that I'm not thinking of yet. Recording slot? Internal Mapping Position? Memory Position?
TBH> I kept reading Cosmos as Cmos - as in CMOS memory. A computer hardware term, or perhaps it had to do with a pin on the processor... I didn't connect it to a bigger conceptual idea of how the hardware was dealing with it.
Do you have concept overview document that would explain this?