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Is there a way to change/modify memory timings before compiling rom? (MSI Z790) #1076

Open MykeHalk opened 1 month ago

MykeHalk commented 1 month ago

Dasharo version 0.9.2-rc1

Dasharo variant MSI-Z790

Question text Before compiling/building the rom is there a way to modify the memory timings and other settings for the different XMP profiles?

For ram I am using Kingston FURY DDR5 64GB (2 x 32GB) 6000MHz (KF560C30BBEAK2-64)

XMP Profile 1 runs the memory at 6000MHz and is able to complete memory training but causes the OS to crash basically doing nothing, just sitting on the desktop of Linux.

XMP Profile 2 is able to run at 5600MHz without crashing or issues but memtest reveals quite a lot of memory errors.

I'm keen on trying to get the full speed out of the ram.

I was wondering if its maybe possible to adjust the timings so that it would allow the ram to run stable, possibly even at the rated 6000MHz.

Is there a way to make adjustments or modifications to timings before compiling the rom? Or is XMP non adjustable?

zirblazer commented 1 month ago

You can look at here at 13.111 MEMORY_CONFIGURATION what are the possible FSP settings you are able to change, there are a multitude of them related to Timmings. I didn't saw anyone attemping to manually force them instead of letting autodetect from SPD profile.

renehoj commented 1 month ago

I tried manually settings the memory timings, as @zirblazer says you need to use the FSP and compile a custom version of Dasharo.

The memory I was using was running at 3600MHz with Dasharo, and the Dasharo XMP setting didn't work with my memory. I could get the memory to run 5000MHz, but I never got it to POST with higher values. My memory could run 5600Mhz without any issues using the MSI firmware, so it should be possible to get it to run faster than 5000MHz.

I thought I could just copy the settings from the MSI firmware, you can read them in the firmware menu, but it wasn't that easy. Having to compile and flash the firmware for every minor change, makes it quite time-consuming, which is why it gave up in the end.

It's also not without risk, if anything goes wrong during the flashing you might need an EPROM programmer to recover the board.

MykeHalk commented 1 month ago

I found this tool on github - ( https://github.com/integralfx/DDR4XMPEditor?tab=readme-ov-file )

From what i understand it modifies the SDP file on your actual ram modules allowing you to tweak the factory XMP profiles.

This tools seems to be for DDR4 ram, so it is not of much use to me. But finding this helped me understand how XMP profiles work and it is possible to modify the profiles on the ram rather than modifying firmware FSP.

Im sure there are other applications and software for DDR5 RAM as well or other methods, I will have to look into this more.

MykeHalk commented 1 month ago

@renehoj - While you are here, you said you have experience making adjustments to Intel FSP. Could you elaborate on how you accomplished this?

What file and which settings did you adjust before building the firmware?

Would appreciate any advice and your experience with the subject.

Repetitive flashing is not an issue for me so I would not have a problem experimenting.

Thanks.

renehoj commented 1 month ago

I believe I modified romstage_fsp_params.c for the mainboard source code.

MykeHalk commented 1 month ago

Is that all you recall? I took a look through the file you mentioned and nothing really stood out to me.

Could you be more specific?

MykeHalk commented 1 month ago

Looks like there is a fork of the DDR4 XMP/SDP Editor thats been forked to DDR5 version

https://github.com/edlf/DDR5SPDEditor

Ill Just leave this here maybe someone will be interested

renehoj commented 1 month ago

You need to add the parameters you want to change, the file does not contain "placeholders".

Here is the FSP documentation https://github.com/intel/FSP/blob/master/RaptorLakeFspBinPkg/Docs/AlderLake_FSP_Integration_Guide.pdf https://github.com/intel/FSP/tree/master/RaptorLakeFspBinPkg/Client/RaptorLakeS

MykeHalk commented 1 month ago

The documentation is always helpful thank you for mentioning it, though I'm asking for your experience on the subject.

What parameters did you add to romstage_fsp_params.c to achieve manually setting the memory timings?

Where in the file did you add them? Is there a specific block I should focus on? Can I just add them to the beginning or end of the file?

Little things like that will help me understand the subject better so I can better read the documentation as well, rather that not knowing where to even start.

renehoj commented 1 month ago

I can't remember, and I don't have access to the server I used to build the ROM.

I flashed the MSI firmware and toke pictures of the memory settings, and then tried to find the same values in the FSP documentation. There are a lot of timing settings, ratio, gear, voltages, etc., it is extremely time-consuming trying to get it to work by trial and error.

I think I added the changes to mainboard_memory_init_params, but I would be wrong, it could also have been meminit_ddr in soc/intel/alderlake/meminit.c. I initially tested if it was working to increasing the memory voltage, it shouldn't prevent the system from booting, and it's easy to verify the change from the OS with something like dmidecode.

One low-hanging fruit could be increasing the DdrFreqLimit to the maximum speed of your memory, that alone made my memory go from 3600 to 4800.