3. Implement LPC protocol in FPGA

[BeataZdunczyk]

While the newest computers use SPI for connecting TPM devices to the mainboard, slightly older, but still widely used hardware uses Low Pin Count (LPC) interface. Implementing this protocol at software level through bit-banging would require very high speed micro-controllers, which would make the cost and power consumption unreasonably high. To the best of our knowledge, there are no MCUs that have LPC controller included as a hardware part of SoC, due to the fact that LPC is specific to PC only. For these reasons hardware implementation is required.

Milestones:

• [x] design and implementation of LPC peripheral in Verilog
• [x] simulation of synthesized code
• [x] documentation describing connection between designed TPM and mainboard
• [x] review and update existing documentation, add entry to changelog

[BeataZdunczyk]

Closing this issue as all requirements are met.

design and implementation of LPC peripheral in Verilog

• https://github.com/Dasharo/verilog-lpc-module/pull/8

• https://github.com/Dasharo/verilog-lpc-module/pull/9

• https://github.com/Dasharo/verilog-lpc-module/pull/10

• https://github.com/Dasharo/verilog-lpc-module/pull/11

• https://github.com/Dasharo/verilog-lpc-module/pull/12 

  simulation of synthesized code

• https://github.com/Dasharo/TwPM_toplevel/pull/1 

  documentation describing connection between designed TPM and mainboard

• https://twpm.dasharo.com/development/verilog_modules/ 

  review and update existing documentation, add entry to changelog

• https://twpm.dasharo.com/changelog/#2023-05-24