4. Implement basic TPM registers in FPGA

[BeataZdunczyk]

Most of the hardware TPM registers must return result immediately or almost immediately. MCUs and their communication with FPGA are not fast enough to acknowledge, parse, prepare response and send it to host in time. Hardware implementation is required for registers that require fast response.

Milestones:

• [x] implementation of TPM register space
• [x] implementation of finite state machine for changing localities
• [x] review and update existing documentation, add entry to changelog

[BeataZdunczyk]

Closing this issue as all requirements are met.

implementation of TPM register space

 - https://github.com/Dasharo/verilog-tpm-fifo-registers#readme  - https://github.com/Dasharo/verilog-tpm-fifo-registers/pull/1

implementation of finite state machine for changing localities

- https://github.com/Dasharo/verilog-tpm-fifo-registers/pull/2

review and update existing documentation, add entry to changelog

- https://twpm.dasharo.com/development/verilog_modules/ - https://twpm.dasharo.com/development/ - https://twpm.dasharo.com/explanation/compliance/ - https://twpm.dasharo.com/changelog/#2023-05-24