Vector registers do not wrap around through zero. This constraint is to help provide forward-compatibility with a future longer instruction encoding that has more addressable vector
registers.
perhaps move to general register addressing section with reminder at this location
near end of section 7.8
add this
Vector registers do not wrap around through zero. This constraint is to help provide forward-compatibility with a future longer instruction encoding that has more addressable vector registers.
perhaps move to general register addressing section with reminder at this location near end of section 7.8