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DavidToddMiller / gr-HighDataRate_Modem

GNU Radio High Data Rate (HDR) Modem Flowgraphs using CPU Cores in Parallel
GNU General Public License v3.0
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frame length and chunk length connection #4

Open mehdi200180 opened 3 weeks ago

mehdi200180 commented 3 weeks ago

Hi. my question is how you chose the 70k and 12k for chunk length (excluding its overlap) and overlap and what is the connection between these numbers and frame_length. and how can i add more frame lengths support to the structure? (there are five frame_length support now in the demodulator) i also have another question, what is the buffer length in the frame extract block and why there are two different buffer length option in that block?

mehdi200180 commented 3 weeks ago

can you please give answer to my question

DavidToddMiller commented 2 weeks ago

For, the approach, I had to balance different design characteristics and choices:

  1. Balance Processing Speed vs Latency:
    • Overhead of overlap
    • Number of parallel chains
    • How many samples to process per GNU Radio scheduler block call
    • Available number of CPU cores
  2. Flexibility: For example, a Chunk Length that can work over many different frame lengths. But also, if chunk length is too short, then that would negatively impact processing speed. If too long, that would negatively impact latency.
  3. Don't want to miss a frame.
  4. Don't want to have duplicate frames at output due to overlap.

I provided the detailed design document on this github repository in the /docs folder.

On your last question on buffer length, I use it to control the samples (and frames) processed per block call in order to again balance processing speed vs latency and set a specific minimum number of samples (and frames) per block call to be processed:

It may help to check out Marcus Muller's GNU Radio Scheduler and Ring/Circular Buffer talk at following link: https://www.youtube.com/watch?v=_iaJsSEHWpU

To maximize processing speed, it is essential to understand the "under the hood" GNU Radio architecture/scheduler and buffer design that Marcus covers in detail.

At some point, when a lot of time is available, I can maybe add an Appendix to the design document that provides additional detailed step-by-step directions on adding more frame length and data rate options or other options that would require additional code updates and additional parallel chains in some cases, but not all cases.