search

DavidWigley / Digital-Logic-Final-Project

Final Project for ELEC 2275. Tic-Tac-Toe Verilog implementation.
0 stars 0 forks source link

Cleanup #6

Open DavidWigley opened 7 years ago

DavidWigley commented 7 years ago

The Logisim and Verilog portions of the project should be cleaned.

For Logisim remove circuits not connected to anything (there is a bit extender in used), also lots of probes in the IC's

For Verilog remove dead code

DavidWigley commented 7 years ago

For Logisim use the Flamingo revision.

Not sure where these naming conventions are from but are definitely not NATO phonetic standard.

alexanderepstein commented 7 years ago

Sorry the naming conventions adhere to the HAMSTER standard