patch for kernel changes?

[annerajb]

do you have a patch file for kernel changes or link to them?

[wilkinsw]

I'll update the documentation today. Everything just got a lot simpler with the new 4.4 kernel, just adding a dtsi.

[annerajb]

I noticed since before there where a lot compare to this one.

[wilkinsw]

Yeah, updated from r24.2 to r28.1, everything changed. I made the old version a release.

[wilkinsw]

Updated the documentation. All you have to do is add one dtsi and recompile the dtb. I'd appreciate it if you could look through it and let me know which parts are confusing.

[annerajb]

Few tips/feedback:

Can Bus subsystem support -> can device drivers -> can spi interfaces -> microchip mcp251x spi can controller Add to click save, overwrite .config and exit

Also your DTS are for J23 should mention that boldly I was about to go crazy trying to figure out why J21 SPi1.0 was not working lol.

[annerajb]

I been trying to get a DTS made for J21 without avail. Do you mind uploading a DTS to the repo for using J21?

[wilkinsw]

What do you have so far?

Should just be something like the below, substituting your interrupt pin. If you're using cs1 then it will be can@1, and reg = <0x1>

    /* J21 Header SPI1 */
    /* Note the difference in numbering between the connector and device */
    spi@7000d400 {
        status = "okay";
        spi-max-frequency = <2000000>;

        can@0 {
            #address-cells = <0x1>;
            #size-cells = <0x0>;
            compatible = "microchip,mcp2515";
            reg = <0x0>;

            clocks = <&clk16m>;
            interrupt-parent = <&gpio>;
            interrupts = <YOUR_PIN_HERE IRQ_TYPE_EDGE_FALLING>;
            spi-max-frequency = <2000000>;
        };
    };

[wilkinsw]

This is for a custom board connected to J23, which is why I removed the J21 stuff

[annerajb]

This is my dtsi. I am trying to use SP1 on J21 and GPIO186 / GPIO9_MOTION_INT for the interrupt with SPI1_CS0# as CS pin

/ {
clocks {
    /* 16MHz external crystal oscillator */
    daxc03_clock: mcp251x_osc {
        #clock-cells = <0>;
        compatible = "fixed-clock";
        clock-frequency = <16000000>;
    };
};

pinmux@700008d4 {
    common {
        lcd_rst_pv2 {
            nvidia,pins = "lcd_rst_pv2";
            nvidia,pull = <0x2>;
            nvidia,tristate = <0x0>;
            nvidia,enable-input = <TEGRA_PIN_ENABLE>;
        };

        touch_rst_pv6 {
            nvidia,pins = "touch_rst_pv6";
            nvidia,pull = <0x2>;
            nvidia,tristate = <0x0>;
            nvidia,enable-input = <TEGRA_PIN_ENABLE>;
        };
        motion_int_pv9 {
            nvidia,pins = "motion_int";
            nvidia,pull = <0x2>;
            nvidia,tristate = <0x0>;
            nvidia,enable-input = <TEGRA_PIN_ENABLE>;
        };
    };
};
gpio@6000d000 {
/* Needed for J21 Header SPI1 */
gpio_default: default {
    gpio-input = <170 174 185 186>; // Set PV2, PV6, and PX1 to input
    gpio-to-sfio = <16 17 18 19 20>; // J21 Header SPI1
};
};
/* J21 Header SPI1 */
/* Note the difference in numbering between the connector and device */
spi@7000d400 {
    status = "okay";
    spi-max-frequency = <2000000>;

    can@0 {
        #address-cells = <0x1>;
        #size-cells = <0x0>;
        compatible = "microchip,mcp2515";
        reg = <0x0>;

        clocks = <&daxc03_clock>;
        interrupt-parent = <&gpio>;
        interrupts = <TEGRA_GPIO(G,14) IRQ_TYPE_EDGE_FALLING>;
        spi-max-frequency = <2000000>;
    };
};

};

[wilkinsw]

I don't think gpio_default works anymore, it's done with pinmux.

grep kernel/kernel4.4/Documentation to find "nvidia,pins" (grep -e "nvidia,pins" -r *)and there should be a document that shows how to change the pin function. I'm not at work so I don't have the source in front of me.

[wilkinsw]

kernel/kernel4.4/Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-pinmux.txt

Optional subnode-properties:

• nvidia,function: A string containing the name of the function to mux to the pin or group.

Valid values for nvidia,functions are:

aud, bcl, blink, ccla, cec, cldvfs, clk, core, cpu, displaya, displayb, dmic1, dmic2, dmic3, dp, dtv, extperiph3, i2c1, i2c2, i2c3, i2cpmu, i2cvi, i2s1, i2s2, i2s3, i2s4a, i2s4b, i2s5a, i2s5b, iqc0, iqc1, jtag, pe, pe0, pe1, pmi, pwm0, pwm1, pwm2, pwm3, qspi, rsvd0, rsvd1, rsvd2, rsvd3, sata, sdmmc1, sdmmc3, shutdown, soc, sor0, sor1, spdif, spi1, spi2, spi3, spi4, sys, touch, uart, uarta, uartb, uartc, uartd, usb, vgp1, vgp2, vgp3, vgp4, vgp5, vgp6, vimclk, vimclk2

If we check the pinmux document we see that those pins are:

• spi1_mosi_pc0
• spi1_miso_pc1
• spi1_sck_pc2
• spi1_cs0_pc3
• spi1_cs1_pc4

Which already seem to be set as spi in the pinmux:

                    spi1_mosi_pc0 {
                            nvidia,pins = "spi1_mosi_pc0";
                            nvidia,function = "spi1";
                            nvidia,pull = <0x1>;
                            nvidia,tristate = <0x0>;
                            nvidia,enable-input = <0x1>;
                    };

                    spi1_miso_pc1 {
                            nvidia,pins = "spi1_miso_pc1";
                            nvidia,function = "spi1";
                            nvidia,pull = <0x1>;
                            nvidia,tristate = <0x0>;
                            nvidia,enable-input = <0x1>;
                    };

                    spi1_sck_pc2 {
                            nvidia,pins = "spi1_sck_pc2";
                            nvidia,function = "spi1";
                            nvidia,pull = <0x1>;
                            nvidia,tristate = <0x0>;
                            nvidia,enable-input = <0x1>;
                    };

                    spi1_cs0_pc3 {
                            nvidia,pins = "spi1_cs0_pc3";
                            nvidia,function = "spi1";
                            nvidia,pull = <0x2>;
                            nvidia,tristate = <0x0>;
                            nvidia,enable-input = <0x1>;
                    };

                    spi1_cs1_pc4 {
                            nvidia,pins = "spi1_cs1_pc4";
                            nvidia,function = "spi1";
                            nvidia,pull = <0x2>;
                            nvidia,tristate = <0x0>;
                            nvidia,enable-input = <0x1>;
                    };

[wilkinsw]

What pin are you trying to set as the interrupt?

interrupts = <TEGRA_GPIO(G,14) IRQ_TYPE_EDGE_FALLING>;

I don't see 'G' as a valid grouping.

[wilkinsw]

Oh I think I see what you did. Were you taking G14 from column B of the pinmux spreadsheet? That's the pin name, not the gpio name (confusing right?). G14 would be GPIO3_PX.02.

That means your interrupts would be this:

interrupts = <TEGRA_GPIO(X,2) IRQ_TYPE_EDGE_FALLING>;

And your pinmux would be:

                    motion_int_px2 {
                            nvidia,pins = "motion_int_px2";
                            nvidia,function = "rsvd0";
                            nvidia,pull = <0x2>;
                            nvidia,tristate = <0x0>;
                            nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                    };

[wilkinsw]

Should look something like this: https://gist.github.com/Atrer/141a3ab1a3bd3afc92b4eaed932283b1

[annerajb]

Didn't work but I just realized that I was never able to find this in the menuconfig: Do you know the text equivalent of this usermode spi device dtsi support? So i can add it to the .config by hand?

Device Drivers ---> [] SPI support ---> <> User mode SPI device dtsi support

[wilkinsw]

Did you start from a tegra21_defconfig?

It's at that location the second one from the bottom under SPI Protocol Masters for me

[annerajb]

It's there with a different wording. It says "User mode SPI device driver support" I have been looking for the word DTSI everywhere. It's a tegra21_defconfig with a few configs for enabling docker

[wilkinsw]

oh, woops, I should update that

[annerajb]

Still didn't work btw. Can you provide with a sample of text that should show on the dsmg related to the mcp. I tried dmesg | grep mcp and nothing showed up. I am also looking into proc/device-tree (or something along those lines) to see if I can find my can node from the dtsi with no luck.

[wilkinsw]

There's no indication if it probes or not, unless it has an error. What I usually do is put my own debug messages into the source.

kernel/kernel-4.4/drivers/net/can/spi/mcp251x.c

Go down to mcp251x_can_probe(struct spi_device *spi) and put in a print statement using pr_info();

Something like this...

static int mcp251x_can_probe(struct spi_device *spi)
{
    const struct of_device_id *of_id = of_match_device(mcp251x_of_match,
                               &spi->dev);
    struct mcp251x_platform_data *pdata = dev_get_platdata(&spi->dev);
    struct net_device *net;
    struct mcp251x_priv *priv;
    struct clk *clk;
    int freq, ret;

    pr_info("%s this is my print statement, it works just like printf\n", __func__);
    ...
}

Recompile the kernel and copy Image into /boot/ with scp, then reboot the board. No need to reflash.

[annerajb]

Did that along with a adding a bunch of dyndbg prints Got this one message from the dyndbgs bus 'spi': add driver mcp251x

I never got a message of the mcp being bound I went ahead and changed on the sample dtsi you sent me the name from mcp2515 to mcp2510 which still did not do any difference.

[wilkinsw]

I'll put my logic analyzer on the pins sometime today and see if I can get it to try to probe with that gist.

[annerajb]

hey, Did more digging. I haven't put a logic analyzer since mine is tied up to hardware I am debugging. Gonna try getting another one tomorrow.

Meanwhile did two experiments moved over to the new 28.2 kernel branch/tag from nvidia. This was done using the source_sync command and Enabled SPI driver debugging on menu config. This finally got me output in the dmesg showing that it was sending spi packets.

Second I found this SO post; https://stackoverflow.com/questions/35580862/device-tree-mismatch-probe-never-called I was there able to see the mcp2515 driver being loaded/compiled fine and the Device tree knowing that it needs to bind it to the spi port correctly and that it is enabled.

switched back to the 28.1 and noticed that it also was printing so i neded that spi driver debuggint to see the packets in dmsg.

I decided to try the debgging prints again moved this time to pr_err apparently the first time i didn't setup the print levels correctly and was not seeing anything due to it. Once I switched over to error started seeing the mcp driver functions being printed.

it's failling reading the cant stat register after a hw_reset of the can. I suspect some sort of spi comms issue must be going on. will know for sure once i connect the logic analyzer in the week.

I also switched the hardware to a raspberry pi and it worked fine the first try. So that ruled hardware out. verified (again) power inputs to the mcp using a meter. BTW I am using a mcp2515 (not a mcp2510 as stated above incorrectly)

[wilkinsw]

Just realized they switched up how the DTB is updated again. Still trying to figure out the correct way of doing it now.

Look in dmesg and confirm that your dtb is even being updated:

nvidia@tegra-ubuntu:~$ dmesg | grep DTB
[    0.026872] DTB Build time: Mar 14 2018 12:00:27
[    0.159879] DTB Build time: Mar 14 2018 12:00:27

[annerajb]

Yup i got paranoic was checking build times every single time i copied and flashed either kernel or DTB. IRC it was correct.

[wilkinsw]

I know sudo ./flash.sh -r -k DTB <platform> mmcblk0p1 works for Jetpack 3.1 (28.1), but 3.2 (28.2) isn't updating

[wilkinsw]

There's a thread on enabling J21 SPI on the TX2 that might be helpful: https://devtalk.nvidia.com/default/topic/1024806/how-to-enable-spi-spidev-on-28-1-on-target-/

[wilkinsw]

Edit: linuxdev says this might not work as expected: https://devtalk.nvidia.com/default/topic/1031215/jetson-tx1/jetpack-flashing-dtb-only/post/5246236/#5246236

Looks like you can add the below line to /boot/extlinux/extlinux.conf and update the DTB just by copying over the DTB

FDT /boot/dtb/tegra210-jetson-tx1-p2597-2180-a01-devkit.dtb

That'll make iteration a lot faster. Here's the full file:

 TIMEOUT 30
 DEFAULT PRIMARY
 MENU TITLE p2771-0000 eMMC boot options
 LABEL primary
     MENU LABEL primary kernel
     LINUX /boot/Image
     FDT /boot/dtb/tegra186-quill-p3310-1000-c03-00-base.dtb
     APPEND ${cbootargs} root=/dev/mmcblk0p1 rw rootwait rootfstype=ext4

[annerajb]

BTW I moved back to 28.1 to keep myself in sync with your changes and this repository and minimize the amount of variation.

I had no issues flashing DTB (but I am in 28.1) my testing on 28.2 was a quick sanity check and only for 15 minutes I immediately went back to 28.1.

At this point, every time I run dtb flash script I run dmesg | grep DTB to make sure the build time match with my DTB build time.

The thread you linked regarding enabling J21 SPI on TX2 I saw no mention of TX1 except that the old TX1 wiki pages are not relevant for tx2.

Are you moving over to get this working on 28.2?

[wilkinsw]

I was hoping to get 28.2 working, but I wasn't able to get the GPIO to behave. Going to stay on 3.1 for now since I know for sure that worked. After Wednesday I should be able to devote more time to this.

[annerajb]

if you do a sudo cat /sys/kernel/debug/tegra_gpio do you see the row 3 1f as the old steps show: https://elinux.org/Jetson/TX1_SPI#Verifying_GPIO_PinMux

in my case, I am not seeing anything coming out of the SPI ports with the logic analyzer and I noticed that the row 3 of the tegra_gpio has 1F. I also noticed that the name of the spi device is spi0.0 Shouldn't it be spi1.0 or spi0.1 if it's J21?

I am going try connecting my logic analyzer to all ports of the J21 connector to see if the data is coming out another one.

[annerajb]

found the fix. See last comment here dtsi file is on post TL;DR; the gpio-to-sfio is now done a different way on 28.1 requiring a different section to enable the spi ports. You prob don't have the issue since your ports are hardcoded as SPI versus j21 spi ports which are GPIO spis https://devtalk.nvidia.com/default/topic/998947/jetson-tx1/guide-to-enabling-mcp251x-mcp2515-on-the-tx1-spi-can-/3/?offset=37#5246839

[wilkinsw]

Nice job, I'll update the gists linked on that thread. Thanks for spending the time to figure it out!