DelfiSpace / DelfiPQcore

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MSP432P4111 support #36

Open StefanoSperetta opened 4 years ago

StefanoSperetta commented 4 years ago

The MSP432P4111 differs internally from the MSP432P401R used so far. Besides the FLASH memory size (2MB instead of 265kB), the FLASH controller (FlashCtl_A instead of FlashCtl), the SysController (SysCtl_A instead of SysCtl) have different API and define names.

This causes issues is:

This will require #if statements to select which CPU is used. This is an example from initMCU():

#if defined (__MSP432P401R__)
    MAP_FlashCtl_setWaitState(FLASH_BANK0, 2);  
    MAP_FlashCtl_setWaitState(FLASH_BANK1, 2);  
#elif defined (__MSP432P4111__)
    MAP_FlashCtl_A_setWaitState(FLASH_A_BANK0, 3);
    MAP_FlashCtl_A_setWaitState(FLASH_A_BANK1, 3);
#endif

The project needs to also be modified to compile for the MSP432P4111. This will require a dedicated branch to be created for all projects (and for the FLightSOftwareWorkspace) to be able to continue programming for both MSPs while we transition from the small to the big one.

CasperBroekhuizen commented 4 years ago

Just leaving a note here: There can be a slight difference in functionality between SysCTL vs SysCTL_A and FlashCTL vs FlashCTL_A:

(change in SRAMBank ->SRAM, bool returns instead of void, new function getInfoFlashSize)

(Sector protection does not exist; now just memory and memory ranges)

CasperBroekhuizen commented 4 years ago

Initial changes on https://github.com/DelfiSpace/DelfiPQcore/commit/2a70e1ddc7c04fef5f02990311c21854583eb54e Needs testing (specifically SWUpdate, when FRAM issue is resolved) image