Closed Wanderingidea closed 7 months ago
Please read the manual.
When the system clock frequency is 6 MHz, the watchdog timing cycle (Twdc) is about 2.8 s when 00h is written, and about 1.4 s when 80h is written. The timing cycle is halved when the system clock frequency is 12 MHz.
Hi,
When I setup a watchdog like this:
SAFE_MOD = 0x55; //enter safe mode SAFE_MOD = 0xAA; //continued GLOBAL_CFG |= bWDOG_EN; //start watchdog SAFE_MOD = 0x00; //exit safe mode WDOG_COUNT = 0x00; //2.8 sec
and although I timely 'feed' the watchdog by setting WDOG_COUNT to 0x00, I noticed the watchdog triggers not after 2.8 seconds but much, much faster than that, way too fast.
Could this be an anomaly of the CH552 itself?
Thanks!