Closed AdriaanRol closed 3 years ago
While implementing this I found that the device object, which controls the DIO/coarse timing also controls the fine timing (used by setting channel per channel latencies). The problem here is that it uses a single parameter to set this for all qubits. This is incorrect and should be addressed.
Closed due to inactivity
Make the mapping for the timing configuration select one of two defaults so that the timing settings are properly set when using the device object.
Currently the map to CCL DIO channels is hardcoded for the CCL.