Closed cheresioana closed 6 years ago
Check the Source tab. The DVIClocking module probably became top-level for the project instead of the wrapper for the block design. You most probably have errors from create_project.tcl. And most probably it is because you downloaded the repo via zip file instead of cloning it with --recursive or getting it from releases: https://github.com/Digilent/Zybo-Z7-20-pcam-5c/releases
[Place 30-569] BUFIO instance 'SerialClkBuffer' is driving 'I' pin of instance 'SerialClk_OBUF_inst'{OBUF}. This will lead to unroutable situation. A BUFIO can drive only clock pins of IO tile